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From: Stijn Tintel <stijn@linux-ipv6.be>
To: musl@lists.openwall.com
Subject: [musl] [PATCH] ppc64: check for AltiVec in setjmp/longjmp
Date: Tue,  7 Dec 2021 01:43:58 +0200	[thread overview]
Message-ID: <20211206234358.2174444-1-stijn@linux-ipv6.be> (raw)

On machines without AltiVec, the lvx and stvx instructions are not
supported. Use __hwcap to test if AltiVec is supported.

Fixes SIGILL on PowerPC 64 processors without AltiVec support.
Runtime-tested on e5500 and e6500.

Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be>
---
 src/setjmp/powerpc64/longjmp.s | 13 ++++++++++++-
 src/setjmp/powerpc64/setjmp.s  | 13 ++++++++++++-
 2 files changed, 24 insertions(+), 2 deletions(-)

diff --git a/src/setjmp/powerpc64/longjmp.s b/src/setjmp/powerpc64/longjmp.s
index 81d45ff6..da7172af 100644
--- a/src/setjmp/powerpc64/longjmp.s
+++ b/src/setjmp/powerpc64/longjmp.s
@@ -56,7 +56,17 @@ longjmp:
 	lfd 30, 38*8(3)
 	lfd 31, 39*8(3)
 
-	# 6) restore vector registers v20-v31
+	# 6) restore vector registers v20-v31 if hardware supports AltiVec
+	mflr 0
+	bl 1f
+	.hidden __hwcap
+	.long __hwcap-.
+1:      mflr 4
+	lwz 5, 0(4)
+	add 4, 4, 5
+	ld 4, 0(4)
+	andis. 4, 4, 0x1000
+	beq 1f
 	addi 3, 3, 40*8
 	lvx 20, 0, 3 ; addi 3, 3, 16
 	lvx 21, 0, 3 ; addi 3, 3, 16
@@ -70,6 +80,7 @@ longjmp:
 	lvx 29, 0, 3 ; addi 3, 3, 16
 	lvx 30, 0, 3 ; addi 3, 3, 16
 	lvx 31, 0, 3
+1:	mtlr 0
 
 	# 7) return r4 ? r4 : 1
 	mr    3,   4
diff --git a/src/setjmp/powerpc64/setjmp.s b/src/setjmp/powerpc64/setjmp.s
index 37683fda..32853693 100644
--- a/src/setjmp/powerpc64/setjmp.s
+++ b/src/setjmp/powerpc64/setjmp.s
@@ -69,7 +69,17 @@ __setjmp_toc:
 	stfd 30, 38*8(3)
 	stfd 31, 39*8(3)
 
-	# 5) store vector registers v20-v31
+	# 5) store vector registers v20-v31 if hardware supports AltiVec
+	mflr 0
+	bl 1f
+	.hidden __hwcap
+	.long __hwcap-.
+1:	mflr 4
+	lwz 5, 0(4)
+	add 4, 4, 5
+	ld 4, 0(4)
+	andis. 4, 4, 0x1000
+	beq 1f
 	addi  3, 3, 40*8
 	stvx 20, 0, 3 ; addi 3, 3, 16
 	stvx 21, 0, 3 ; addi 3, 3, 16
@@ -83,6 +93,7 @@ __setjmp_toc:
 	stvx 29, 0, 3 ; addi 3, 3, 16
 	stvx 30, 0, 3 ; addi 3, 3, 16
 	stvx 31, 0, 3
+1:	mtlr 0
 
 	# 6) return 0
 	li 3, 0
-- 
2.32.0


             reply	other threads:[~2021-12-06 23:44 UTC|newest]

Thread overview: 21+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-06 23:43 Stijn Tintel [this message]
2021-12-07  0:37 ` Florian Weimer
2021-12-07  0:59   ` Rich Felker
2021-12-07  1:15     ` David Edelsohn
2021-12-07  1:39       ` Rich Felker
2021-12-07  1:44         ` David Edelsohn
2021-12-07 13:25           ` Rich Felker
2021-12-07 13:39             ` David Edelsohn
2021-12-07 14:43               ` Rich Felker
2021-12-07 14:48                 ` David Edelsohn
2021-12-07 18:39             ` Markus Wichmann
2021-12-07 18:57               ` David Edelsohn
2021-12-07 19:28               ` Florian Weimer
2021-12-07 20:15                 ` Markus Wichmann
2021-12-07 20:29                   ` Rich Felker
2021-12-08  5:02                     ` Markus Wichmann
2021-12-07 18:27           ` James Y Knight
2021-12-07 18:57             ` Markus Wichmann
2021-12-08  8:43     ` Stijn Tintel
2021-12-08 13:37       ` Rich Felker
2021-12-08 15:36         ` Rich Felker

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