From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-1.5 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_LOW,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL,T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 5778 invoked from network); 28 Jul 2023 06:21:05 -0000 Received: from second.openwall.net (193.110.157.125) by inbox.vuxu.org with ESMTPUTF8; 28 Jul 2023 06:21:05 -0000 Received: (qmail 9405 invoked by uid 550); 28 Jul 2023 06:21:00 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 9367 invoked from network); 28 Jul 2023 06:20:59 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:Subject:Date:Message-Id:MIME-Version; bh=Tar9I uSarVwLOFNgXT0jva6nWpsBg7Xt8L5GMaUFW+c=; b=lO6n9ps26H7NC8hn6jAqR DDZ1IQ004+FWO4mOto1laOj+L+D56/0eYX/Q82SIdhPDV1dH0zhY4V/x07J2hZj8 Qx46bTuwImnMXN5igSj/r1t5HzUd8jUv9K1LTAyukVqUhkIOiD+qrtsXBics7hR/ adK1py1q0bJeKbGIY0XDps= From: zhangfei To: musl@lists.openwall.com Cc: dalias@libc.org, zhangfei Date: Fri, 28 Jul 2023 14:19:55 +0800 Message-Id: <20230728061955.20156-2-zhang_fei_0403@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230728061955.20156-1-zhang_fei_0403@163.com> References: <20230728061955.20156-1-zhang_fei_0403@163.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID:_____wA3RdkOXsNk+3H2BQ--.34197S3 X-Coremail-Antispam: 1Uf129KBjvJXoWxGr1DJF4kCr1fKF45Zw48Xrb_yoWrAw47pa n8CFWFyr1rZr4fXrW3W347JFy5Jr4v9Fy5JryxurW8ArW3tw1UGFnxZry0yrWfJF1UtFW5 uFs8JFWYkwnYq3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07UXzVbUUUUU= X-Originating-IP: [180.110.114.165] X-CM-SenderInfo: x2kd0w5bihxsiquqjqqrwthudrp/1tbiMhO6l1WB4u-5OwAAsX Subject: [musl] [PATCH 1/1] RISC-V: Add some mathematical functions to riscv64 From: zhangfei Add a series of function implementations such as lrint and lround. Signed-off-by: Zhang Fei --- src/math/riscv64/llrint.c | 16 ++++++++++++++++ src/math/riscv64/llrintf.c | 16 ++++++++++++++++ src/math/riscv64/llround.c | 16 ++++++++++++++++ src/math/riscv64/llroundf.c | 16 ++++++++++++++++ src/math/riscv64/lrint.c | 16 ++++++++++++++++ src/math/riscv64/lrintf.c | 16 ++++++++++++++++ src/math/riscv64/lround.c | 16 ++++++++++++++++ src/math/riscv64/lroundf.c | 16 ++++++++++++++++ 8 files changed, 128 insertions(+) create mode 100644 src/math/riscv64/llrint.c create mode 100644 src/math/riscv64/llrintf.c create mode 100644 src/math/riscv64/llround.c create mode 100644 src/math/riscv64/llroundf.c create mode 100644 src/math/riscv64/lrint.c create mode 100644 src/math/riscv64/lrintf.c create mode 100644 src/math/riscv64/lround.c create mode 100644 src/math/riscv64/lroundf.c diff --git a/src/math/riscv64/llrint.c b/src/math/riscv64/llrint.c new file mode 100644 index 0000000..2b5ea25 --- /dev/null +++ b/src/math/riscv64/llrint.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 64 + +long long llrint (double x) +{ + long long res; + __asm__ ("fcvt.l.d %0, %1" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../llrint.c" + +#endif diff --git a/src/math/riscv64/llrintf.c b/src/math/riscv64/llrintf.c new file mode 100644 index 0000000..d69566b --- /dev/null +++ b/src/math/riscv64/llrintf.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 32 + +long long llrintf (float x) +{ + long long res; + __asm__ ("fcvt.l.s %0, %1" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../llrintf.c" + +#endif diff --git a/src/math/riscv64/llround.c b/src/math/riscv64/llround.c new file mode 100644 index 0000000..d6d2619 --- /dev/null +++ b/src/math/riscv64/llround.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 64 + +long long llround (double x) +{ + long long res; + __asm__ ("fcvt.l.d %0, %1, rmm" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../llround.c" + +#endif diff --git a/src/math/riscv64/llroundf.c b/src/math/riscv64/llroundf.c new file mode 100644 index 0000000..72b343a --- /dev/null +++ b/src/math/riscv64/llroundf.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 32 + +long long llroundf (float x) +{ + long long res; + __asm__ ("fcvt.l.s %0, %1, rmm" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../llroundf.c" + +#endif diff --git a/src/math/riscv64/lrint.c b/src/math/riscv64/lrint.c new file mode 100644 index 0000000..c62e306 --- /dev/null +++ b/src/math/riscv64/lrint.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 64 + +long lrint (double x) +{ + long res; + __asm__ ("fcvt.l.d %0, %1" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../lrint.c" + +#endif diff --git a/src/math/riscv64/lrintf.c b/src/math/riscv64/lrintf.c new file mode 100644 index 0000000..6f3b120 --- /dev/null +++ b/src/math/riscv64/lrintf.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 32 + +long lrintf (float x) +{ + long res; + __asm__ ("fcvt.l.s %0, %1" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../lrintf.c" + +#endif diff --git a/src/math/riscv64/lround.c b/src/math/riscv64/lround.c new file mode 100644 index 0000000..7d061e8 --- /dev/null +++ b/src/math/riscv64/lround.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 64 + +long lround (double x) +{ + long res; + __asm__ ("fcvt.l.d %0, %1, rmm" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../lround.c" + +#endif diff --git a/src/math/riscv64/lroundf.c b/src/math/riscv64/lroundf.c new file mode 100644 index 0000000..34d978b --- /dev/null +++ b/src/math/riscv64/lroundf.c @@ -0,0 +1,16 @@ +#include + +#if __riscv_flen >= 32 + +long lroundf (float x) +{ + long res; + __asm__ ("fcvt.l.s %0, %1, rmm" : "=r" (res) : "f" (x)); + return res; +} + +#else + +#include "../lroundf.c" + +#endif -- 2.34.1