From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 15604 invoked from network); 16 Nov 2023 16:45:02 -0000 Received: from second.openwall.net (193.110.157.125) by inbox.vuxu.org with ESMTPUTF8; 16 Nov 2023 16:45:02 -0000 Received: (qmail 22343 invoked by uid 550); 16 Nov 2023 16:44:36 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 22306 invoked from network); 16 Nov 2023 16:44:35 -0000 Date: Thu, 16 Nov 2023 17:44:20 +0100 From: Szabolcs Nagy To: Hongliang Wang Cc: musl@lists.openwall.com Message-ID: <20231116164420.GJ1427497@port70.net> Mail-Followup-To: Hongliang Wang , musl@lists.openwall.com References: <20230805154307.GS4163@brightrain.aerifal.cx> <20230813014109.GU4163@brightrain.aerifal.cx> <99d954ca-faee-2cac-97af-7fc2ecdb9a89@loongson.cn> <65857ef7-0ef8-d3c8-d6d8-ea577b99e793@loongson.cn> <20230920131619.GA1427497@port70.net> <9dd23cf9-9795-0704-3a83-085ad9e6054a@loongson.cn> <3838b2d6-8330-33b5-fd87-8af3404a29dc@loongson.cn> <1f1d2528-ae86-46ea-64b1-c5b3ddb1709b@loongson.cn> <7b59ddc0-67ab-4ffa-e083-3e5086dd5de3@loongson.cn> <7aad7a07-9762-3d62-a8c2-4cdf860a7dcb@loongson.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable In-Reply-To: <7aad7a07-9762-3d62-a8c2-4cdf860a7dcb@loongson.cn> Subject: Re: [musl] add loongarch64 port v9. * Hongliang Wang [2023-11-16 10:54:44 +0800]: > Thank you for your suggestion, I have modified the dynamic linker > name according to the basic ABI types are specified in the ABI > document of the LoongArch, and post 0001-add-loongarch64-port-v9.patch, > as shown in the attachment. >=20 > Based on 0001-add-loongarch64-port-v8.patch,the modifications for > 0001-add-loongarch64-port-v9.patch are as follows: note, the new names must match gcc, which seems to be the case: https://gcc.gnu.org/git/?p=3Dgcc.git;a=3Dblob;f=3Dgcc/config/loongarch/gnu-= user.h;h=3D9616d6e8a0b8629720a844fd0122dafef682a4cb;hb=3DHEAD#l36 they do *not* match the names in the cited abi document: https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.htm= l#_program_interpreter_path (uses /lib64/..-loongarch-.. instead of /lib/..-loongarch64-..) the diff looks good. >=20 > --- > arch/loongarch64/reloc.h | 10 ++++++---- > configure | 4 +++- > 2 files changed, 9 insertions(+), 5 deletions(-) >=20 > diff --git a/arch/loongarch64/reloc.h b/arch/loongarch64/reloc.h > index a4482b48..6907de8e 100644 > --- a/arch/loongarch64/reloc.h > +++ b/arch/loongarch64/reloc.h > @@ -1,7 +1,9 @@ > -#ifdef __loongarch_soft_float > -#define FP_SUFFIX "-sf" > -#else > -#define FP_SUFFIX "" > +#if defined __loongarch_double_float > +#define FP_SUFFIX "-lp64d" > +#elif defined __loongarch_single_float > +#define FP_SUFFIX "-lp64f" > +#elif defined __loongarch_soft_float > +#define FP_SUFFIX "-lp64s" > #endif >=20 > #define LDSO_ARCH "loongarch64" FP_SUFFIX > diff --git a/configure b/configure > index 55d179f1..93b06287 100755 > --- a/configure > +++ b/configure > @@ -673,7 +673,9 @@ trycppif __AARCH64EB__ "$t" && SUBARCH=3D${SUBARCH}_be > fi >=20 > if test "$ARCH" =3D "loongarch64" ; then > -trycppif __loongarch_soft_float "$t" && SUBARCH=3D${SUBARCH}-sf > +trycppif __loongarch_double_float "$t" && SUBARCH=3D${SUBARCH}-lp64d > +trycppif __loongarch_single_float "$t" && SUBARCH=3D${SUBARCH}-lp64f > +trycppif __loongarch_soft_float "$t" && SUBARCH=3D${SUBARCH}-lp64s > printf "checking whether compiler support FCSRs... " > echo "__asm__(\"movfcsr2gr \$t0,\$fcsr0\");" > "$tmpc" > if $CC -c -o /dev/null "$tmpc" >/dev/null 2>&1 ; then > --=20 >=20 > Please review again, and point them out if any questions need to be > modified, thanks. >=20 >=20 > Hongliang Wang >=20 > =E5=9C=A8 2023/11/14 =E4=B8=8B=E5=8D=889:16, Jingyun Hua =E5=86=99=E9=81= =93: > > hi, > >=20 > > I have a suggestion regarding the musl dynamic linker name for the > > LoongArch architecture: > >=20 > > The basic ABI types are specified in the ABI document of the LoongArch, > > which can be seen: > > https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN= =2Ehtml > >=20 > > and the dynamic linker name of glibc distinguishes lp64d, lp64s and > > lp64f with abi types.The v8 patch only defines the value of SUBARCH > > as "-sf" for =E2=80=9C__loongarch_soft_float=E2=80=9D, which means that= only > > =E2=80=9Cld-musl-loongarch64.so.1=E2=80=9D or =E2=80=9Cld-musl-loongarc= h64-sf.so.1=E2=80=9D can be > > generated when compiled with the v8 patch. > >=20 > > So I think the musl dynamic linker name for the LoongArch architecture > > needs to be modified, maybe defined like glibc? > >=20 > > Regards, > > Jingyun Hua > >=20 > > On 11/9/23 9:15 PM, Jingyun Hua wrote: > > > Hi all, > > >=20 > > > Thank you for taking the time to check this email. I'm very interested > > > in musl and alpine, and I'd like to know the current status of this > > > patch and what we can do for it next. > > >=20 > > > After Hongliang updated this patch from v7 to v8, in order to verify = it, > > > I built the alpine linux from scratch base on this musl v8 patch on t= he > > > LoongArch64 machine, and successfully compiled projects such as gcc, > > > rust, llvm, go, etc.. Currently, more than 8,500 packages have been > > > built and running normally in my local repository. > > >=20 > > > The patch has indeed been on hold for a long time. Is it in the > > > immediate plans? Is there anything that needs to be modified and > > > improved? > > >=20 > > > Looking forward to your reply, thanks! > > >=20 > > > Regards, > > > Jingyun Hua > > >=20 > > > =E5=9C=A8 2023/9/26 =E4=B8=8A=E5=8D=8811:28, Hongliang Wang =E5=86=99= =E9=81=93: > > > > Hi, > > > >=20 > > > > I have fixed the issues listed below, and post > > > > 0001-add-loongarch64-port-v8.patch,as shown in the attachment. > > > > please review again, if there are anything that need to be modified, > > > > please point out, thank you. > > > >=20 > > > > Hongliang Wang > > > >=20 > > > > =E5=9C=A8 2023/9/22 =E4=B8=8A=E5=8D=889:37, Hongliang Wang =E5=86= =99=E9=81=93: > > > > > Hi, > > > > >=20 > > > > > Thank you for your review, I will modify it according to the revi= ew > > > > > suggestions and post v8 patch later. > > > > >=20 > > > > > Hongliang Wang > > > > >=20 > > > > > =E5=9C=A8 2023/9/20 =E4=B8=8B=E5=8D=889:16, Szabolcs Nagy =E5=86= =99=E9=81=93: > > > > > > * Jianmin Lv [2023-09-20 15:45:39 +0800= ]: > > > > > > > Sorry to bother you, but I just want to know if > > > > > > > there is any progress on > > > > > > > this, because Alpine is blocking by this patch for a > > > > > > > long time. As Hongliang > > > > > > > has explained questions you mentioned one by one, if > > > > > > > any question need to be > > > > > > > discussed, please point them out, so that the patch > > > > > > > can be handled further. > > > > > >=20 > > > > > > i think you should post a v8 patch to move > > > > > > this forward. (not on github, but here) > > > > > >=20 > > > > > > > On 2023/8/15 =E4=B8=8B=E5=8D=884:17, Hongliang Wang wrote: > > > > > > > > =E5=9C=A8 2023/8/13 =E4=B8=8A=E5=8D=889:41, Rich Felker =E5= =86=99=E9=81=93: > > > > > > > > > On Sat, Aug 05, 2023 at 11:43:08AM -0400, Rich Felker wro= te: > > > > > > > > > > On Sat, Aug 05, 2023 at 02:18:35PM +0800, =E7=BF=9F=E5= =B0=8F=E5=A8=9F wrote: > > > > > > > > > > -+#define __BYTE_ORDER 1234 > > > > > > > > > > ++#define __BYTE_ORDER=C2=A0 __LITTLE_ENDIAN > > > > > > > > >=20 > > > > > > > > > This is gratuitous, mismatches what is done on other arch= s, and is > > > > > > > > > less safe. > > > > > > > > >=20 > > > > > > > > The modification is based on the following review suggestio= n( > > > > > > > > WANG Xuerui reviewed in > > > > > > > > https://www.openwall.com/lists/musl/2022/10/12/1): > > > > > > > >=20 > > > > > > > > `#define __BYTE_ORDER __LITTLE_ENDIAN` could be more consis= tent > > > > > > > > with other arches. > > > > > >=20 > > > > > > please use 1234. > > > >=20 > > > > --- a/arch/loongarch64/bits/alltypes.h.in > > > > +++ b/arch/loongarch64/bits/alltypes.h.in > > > > @@ -2,7 +2,7 @@ > > > > =C2=A0=C2=A0#define _Int64 long > > > > =C2=A0=C2=A0#define _Reg=C2=A0=C2=A0 long > > > >=20 > > > > -#define __BYTE_ORDER=C2=A0 __LITTLE_ENDIAN > > > > +#define __BYTE_ORDER=C2=A0 1234 > > > > =C2=A0=C2=A0#define __LONG_MAX=C2=A0=C2=A0=C2=A0 0x7fffffffffffffffL > > > >=20 > > > >=20 > > > > > >=20 > > > > > > > > > > -+TYPEDEF unsigned nlink_t; > > > > > > > > > > ++TYPEDEF unsigned int nlink_t; > > > > > > > > >=20 > > > > > > > > > Gratuitous and in opposite direction of > > > > > > > > > coding style used elsewhere in > > > > > > > > > musl. There are a few other instances of this too. > > > > > > > > >=20 > > > > > > > > Based on the following review question(WANG Xuerui > > > > > > > > reviewed in https://www.openwall.com/lists/musl/2022/10/12/= 1): > > > > > > > >=20 > > > > > > > > `unsigned int`? Same for other bare `unsigned` usages. > > > > > > > >=20 > > > > > > > > I fixed it to a explicit definition. > > > > > >=20 > > > > > > please use plain unsigned, not unsigned int. > > > >=20 > > > > --- a/arch/loongarch64/bits/alltypes.h.in > > > > +++ b/arch/loongarch64/bits/alltypes.h.in > > > > @@ -2,7 +2,7 @@ > > > >=20 > > > > -TYPEDEF unsigned int nlink_t; > > > > +TYPEDEF unsigned nlink_t; > > > > =C2=A0=C2=A0TYPEDEF int blksize_t; > > > >=20 > > > > > >=20 > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 register uintptr_t tp = __asm__("tp"); > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __asm__ ("" : "=3Dr" (= tp) ); > > > > > > > > > > ++=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uintptr_t tp; > > > > > > > > > > ++=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __asm__ __volatile__("= move %0, $tp" : "=3Dr"(tp)); > > > > > > > > > > =C2=A0=C2=A0 +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 return tp; > > > > > > > > >=20 > > > > > > > > > Not clear what the motivation is here. Is it > > > > > > > > > working around a compiler > > > > > > > > > bug? The original form was more optimal. > > > > > > > >=20 > > > > > > > > The modification is based on the following review suggestio= n( > > > > > > > > WANG Xuerui reviewed in > > > > > > > > https://www.openwall.com/lists/musl/2022/10/12/1): > > > > > > > >=20 > > > > > > > > While the current approach works, it's a bit fragile [1], a= nd > > > > > > > > the simple and plain riscv version works too: > > > > > > > >=20 > > > > > > > > uintptr_t tp; > > > > > > > > __asm__ ("move %0, $tp" : "=3Dr"(tp)); > > > > > > > >=20 > > > > > > > > [1]:https://gcc.gnu.org/onlinedocs/gcc/Local-Register-Varia= bles.html#Local-Register-Variables > > > > > > > >=20 > > > > > >=20 > > > > > > this looks ok to me. > > > > > >=20 > > > > > > (original code looks sketchy to me.) > > > > > >=20 > > > > > > > > > > =C2=A0=C2=A0 +#define CRTJMP(pc,sp) __asm__ __volatile_= _( \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "move $sp,%1 ; jr %0" = : : "r"(pc), "r"(sp) : "memory" ) > > > > > > > > > > -+ > > > > > > > > > > -+#define GETFUNCSYM(fp, sym, got) __asm__ ( \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ".hidden " #sym "\n" \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ".align 8 \n" \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 la.local $t1, "#sym" \n" \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0 move %0, $t1 \n" \ > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 : "=3Dr"(*(fp)) : : "m= emory" ) > > > > > > > > > > ++=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "move $sp, %1 ; jr %0"= : : "r"(pc), "r"(sp) : "memory" ) > > > > > > > > >=20 > > > > > > > > > Not clear why this was changed. It was never > > > > > > > > > discussed afaik. It looks > > > > > > > > > somewhat dubious removing GETFUNCSYM and using the maybe-= unreliable > > > > > > > > > default definition. > > > > > > > > >=20 > > > > > > > > Based on the following review question( > > > > > > > > WANG Xuerui reviewed > > > > > > > > in https://www.openwall.com/lists/musl/2022/10/12/1): > > > > > > > >=20 > > > > > > > > Does the generic version residing in ldso/dlstart.c not wor= k? > > > > > > > >=20 > > > > > > > > I found the code logic is consistent with the generic versi= on, So > > > > > > > > I removed the definition here and replaced it with generic = version. > > > > > >=20 > > > > > > i would change it back to the asm. > > > > > >=20 > > > > > > generic version should work, but maybe we don't > > > > > > want to trust the compiler here (there may be > > > > > > ways to compile the generic code that is not > > > > > > compatible with incompletely relocated libc.so) > > > > > > the asm is safer. > > > > > >=20 > > > > --- a/arch/loongarch64/reloc.h > > > > +++ b/arch/loongarch64/reloc.h > > > > @@ -18,3 +18,10 @@ > > > >=20 > > > > =C2=A0=C2=A0#define CRTJMP(pc,sp) __asm__ __volatile__( \ > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "move $sp, %1 ; jr= %0" : : "r"(pc), "r"(sp) : "memory" ) > > > > + > > > > +#define GETFUNCSYM(fp, sym, got) __asm__ ( \ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ".hidden " #sym "\n" \ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ".align 8 \n" \ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 la.local $t1, "#sym" \n" \ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0 move %0, $t1 \n" \ > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 : "=3Dr"(*(fp)) : : "memory" ) > > > >=20 > > > > > > > > > It also looks like v5->v6 rewrote sigsetjmp. > > > > > > > > >=20 > > > > > > > > Based on the following review question( > > > > > > > > WANG Xuerui reviewed > > > > > > > > in https://www.openwall.com/lists/musl/2022/10/12/1): > > > > > > > >=20 > > > > > > > > This is crazy complicated compared to the riscv port, why i= s the > > > > > > > > juggling between a0/a1 and t5/t6 necessary? > > > > > > > >=20 > > > > > > > > I optimized the code implementations. > > > > > >=20 > > > > > > this should be ok. > > > > > >=20 > > > > > > > > > v6->v7: > > > > > > > > >=20 > > > > > > > > > sigcontext/mcontext_t change mostly makes sense, but the > > > > > > > > > namespace-safe and full mcontext_t differ in > > > > > > > > > their use of the aligned > > > > > > > > > attribute and it's not clear that the > > > > > > > > > attribute is needed (since the > > > > > > > > > offset is naturally aligned and any instance > > > > > > > > > of the object is produced > > > > > > > > > by the kernel, not by userspace). > > > > > > > > >=20 > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 long=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __uc_pad; > > > > > > > > >=20 > > > > > > > > > This change to ucontext_t actually makes the > > > > > > > > > struct ABI-incompatible > > > > > > > > > in the namespace-safe version without the > > > > > > > > > alignment attribute. IIRC I > > > > > > > > > explicitly requested the explicit padding > > > > > > > > > field to avoid this kind of > > > > > > > > > footgun. Removing it does not seem like a good idea. > > > > > > > > >=20 > > > > > > > > Initially, we add __uc_pad to ensure uc_mcontext > > > > > > > > is 16 byte alignment. > > > > > > > > Now, we added __attribute__((__aligned__(16))) to > > > > > > > > uc_mcontext.__extcontext[],this can ensure > > > > > > > > uc_mcontext is also 16 byte > > > > > > > > alignment. so __uc_pad is not used. > > > > > > > >=20 > > > > > > > > Remove __uc_pad, from the point of struct > > > > > > > > layout, musl and kernel are > > > > > > > > consistent. otherwise, I think it may bring a sense of inco= nsistency > > > > > > > > between kernel and musl. Due to Loongarch is not > > > > > > > > merged into musl now, > > > > > > > > Remove it no compatibility issues. > > > > > >=20 > > > > > > please add back the padding field. > > > >=20 > > > > --- a/arch/loongarch64/bits/signal.h > > > > +++ b/arch/loongarch64/bits/signal.h > > > > @@ -40,6 +40,7 @@ typedef struct __ucontext > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 struct __ucontext= =C2=A0 *uc_link; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 stack_t=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uc_stack; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 sigset_t=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uc_sigmask; > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 long=C2=A0=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 __uc_pad; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 mcontext_t=C2=A0= =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uc_mcontext; > > > > =C2=A0=C2=A0} ucontext_t; > > > >=20 > > > > > >=20 > > > > > > > > > In stat.h: > > > > > > > > >=20 > > > > > > > > > > -+=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long __pad; > > > > > > > > > > ++=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long __pad1; > > > > > > > > >=20 > > > > > > > > > This is gratuitous and makes the definition > > > > > > > > > gratuitously mismatch what > > > > > > > > > will become the "generic" version of > > > > > > > > > bits/stat.h. There is no contract > > > > > > > > > for applications to be able to access these > > > > > > > > > padding fields by name, so > > > > > > > > > no motivation to make their names match > > > > > > > > > glibc's names or the kernel's. > > > > > > > > >=20 > > > > > > > > OK. > > > > > >=20 > > > > > > please fix it. > > > >=20 > > > > --- a/arch/loongarch64/bits/stat.h > > > > +++ b/arch/loongarch64/bits/stat.h > > > > @@ -6,7 +6,7 @@ struct stat { > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 uid_t st_uid; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 gid_t st_gid; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 dev_t st_rdev; > > > > -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long __pad1; > > > > +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 unsigned long __pad; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 off_t st_size; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 blksize_t st_blksi= ze; > > > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 int __pad2; > > > >=20 > > > > > >=20 > > > > > > > > > In fenv.S: > > > > > > > > >=20 > > > > > > > > > > ++#ifdef __clang__ > > > > > > > > > > ++#define FCSR $fcsr0 > > > > > > > > > > ++#else > > > > > > > > > > ++#define FCSR $r0 > > > > > > > > > > ++#endif > > > > > > > > >=20 > > > > > > > > > It's not clear to me what's going on here. Is there a cla= ng > > > > > > > > > incompatibility in the assembler language you're working = around? Or > > > > > > > > > what? If so that seems like a tooling bug that should be = fixed. > > > > > > > > >=20 > > > > > > > > The GNU assembler cannot correctly recognize $fcsr0, but the > > > > > > > > LLVM IAS does not have this issue, so make a distinction. > > > > > > > > This issue has been fixed in GNU assembler 2.41. but for co= mpatible > > > > > > > > with GNU assembler 2.40 and below, $r0 need reserved. > > > > > >=20 > > > > > > it sounds like the correct asm is $fcsr0, so that's > > > > > > what should be used on all assemblers, not just on > > > > > > clang as. > > > > > >=20 > > > > > > only broken old gnu as should use different syntax. > > > > > > for this a configure test is needed that adds a > > > > > > CFLAG like -DBROKEN_LOONGARCH_FCSR_ASM when fails. > > > > > > and use that for the ifdef. > > > > > >=20 > > > > --- a/configure > > > > +++ b/configure > > > >=20 > > > > if test "$ARCH" =3D "loongarch64" ; then > > > > trycppif __loongarch_soft_float "$t" && SUBARCH=3D${SUBARCH}-sf > > > > +printf "checking whether compiler support FCSRs... " > > > > +echo "__asm__(\"movfcsr2gr \$t0,\$fcsr0\");" > "$tmpc" > > > > +if $CC -c -o /dev/null "$tmpc" >/dev/null 2>&1 ; then > > > > +printf "yes\n" > > > > +else > > > > +printf "no\n" > > > > +CFLAGS_AUTO=3D"$CFLAGS_AUTO -DBROKEN_LOONGARCH_FCSR_ASM" > > > > +fi > > > > fi > > > >=20 > > > > --- a/src/fenv/loongarch64/fenv.S > > > > +++ b/src/fenv/loongarch64/fenv.S > > > > @@ -1,9 +1,9 @@ > > > > =C2=A0=C2=A0#ifndef __loongarch_soft_float > > > >=20 > > > > -#ifdef __clang__ > > > > -#define FCSR $fcsr0 > > > > -#else > > > > +#ifdef BROKEN_LOONGARCH_FCSR_ASM > > > > =C2=A0=C2=A0#define FCSR $r0 > > > > +#else > > > > +#define FCSR $fcsr0 > > > > =C2=A0=C2=A0#endif > > > >=20 > > > > =C2=A0=C2=A0.global=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fecle= arexcept > > > >=20 > > > > > > > >=20 > > > > > > > > The linux kernel also has a similar distinction: > > > > > > > >=20 > > > > > > > > commit 38bb46f94544c5385bc35aa2bfc776dcf53a7b5d > > > > > > > > Author: WANG Xuerui > > > > > > > > Date:=C2=A0=C2=A0 Thu Jun 29 20:58:43 2023 +0800 > > > > > > > >=20 > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 LoongArch: Prepare for assemblers = with > > > > > > > > proper FCSR class support > > > > > > > >=20 > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 The GNU assembler (as of 2.40) mis= -treats > > > > > > > > FCSR operands as GPRs, but > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 the LLVM IAS does not. Probe for t= his and > > > > > > > > refer to FCSRs as"$fcsrNN" > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 if support is present. > > > > > > > >=20 > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 Signed-off-by: WANG Xuerui > > > > > > > > =C2=A0=C2=A0=C2=A0=C2=A0 Signed-off-by: Huacai Chen > > > > > > > >=20 > > > > > > > > > Otherwise, everything looks as expected, I > > > > > > > > > think. I'm okay with making > > > > > > > > > any fixups for merging rather than throwing > > > > > > > > > this back on your team for > > > > > > > > > more revisions, but can you please follow up and clarify = the above? > > > > > >=20 > > > > > > all issues look minor. > > > > > >=20 > > > > > > if you post a v8 it likely gets into a release faster. > > > > > >=20 > > >=20 > >=20 > >From 2d5f9717fda5c16f10d805ce8a26f1e78de440ea Mon Sep 17 00:00:00 2001 > From: wanghongliang > Date: Wed, 15 Nov 2023 01:31:51 +0800 > Subject: [PATCH] add loongarch64 port v9. >=20 > Author: Xiaojuan Zhai > Author: Meidan Li > Author: Guoqi Chen > Author: Xiaolin Zhao > Author: Fan peng > Author: Jiantao Shan > Author: Xuhui Qiang > Author: Jingyun Hua > Author: Liu xue > Author: Hongliang Wang >=20 > Signed-off-by: wanghongliang > --- > arch/loongarch64/atomic_arch.h | 53 ++++ > arch/loongarch64/bits/alltypes.h.in | 18 ++ > arch/loongarch64/bits/fenv.h | 20 ++ > arch/loongarch64/bits/float.h | 16 ++ > arch/loongarch64/bits/posix.h | 2 + > arch/loongarch64/bits/ptrace.h | 4 + > arch/loongarch64/bits/reg.h | 2 + > arch/loongarch64/bits/setjmp.h | 1 + > arch/loongarch64/bits/signal.h | 92 +++++++ > arch/loongarch64/bits/stat.h | 18 ++ > arch/loongarch64/bits/stdint.h | 20 ++ > arch/loongarch64/bits/syscall.h.in | 303 +++++++++++++++++++++ > arch/loongarch64/bits/user.h | 5 + > arch/loongarch64/crt_arch.h | 13 + > arch/loongarch64/pthread_arch.h | 11 + > arch/loongarch64/reloc.h | 29 ++ > arch/loongarch64/syscall_arch.h | 137 ++++++++++ > configure | 15 + > include/elf.h | 104 ++++++- > src/fenv/loongarch64/fenv.S | 78 ++++++ > src/ldso/loongarch64/dlsym.s | 7 + > src/setjmp/loongarch64/longjmp.S | 32 +++ > src/setjmp/loongarch64/setjmp.S | 34 +++ > src/signal/loongarch64/restore.s | 10 + > src/signal/loongarch64/sigsetjmp.s | 25 ++ > src/thread/loongarch64/__set_thread_area.s | 7 + > src/thread/loongarch64/__unmapself.s | 7 + > src/thread/loongarch64/clone.s | 28 ++ > src/thread/loongarch64/syscall_cp.s | 29 ++ > 29 files changed, 1119 insertions(+), 1 deletion(-) > create mode 100644 arch/loongarch64/atomic_arch.h > create mode 100644 arch/loongarch64/bits/alltypes.h.in > create mode 100644 arch/loongarch64/bits/fenv.h > create mode 100644 arch/loongarch64/bits/float.h > create mode 100644 arch/loongarch64/bits/posix.h > create mode 100644 arch/loongarch64/bits/ptrace.h > create mode 100644 arch/loongarch64/bits/reg.h > create mode 100644 arch/loongarch64/bits/setjmp.h > create mode 100644 arch/loongarch64/bits/signal.h > create mode 100644 arch/loongarch64/bits/stat.h > create mode 100644 arch/loongarch64/bits/stdint.h > create mode 100644 arch/loongarch64/bits/syscall.h.in > create mode 100644 arch/loongarch64/bits/user.h > create mode 100644 arch/loongarch64/crt_arch.h > create mode 100644 arch/loongarch64/pthread_arch.h > create mode 100644 arch/loongarch64/reloc.h > create mode 100644 arch/loongarch64/syscall_arch.h > create mode 100644 src/fenv/loongarch64/fenv.S > create mode 100644 src/ldso/loongarch64/dlsym.s > create mode 100644 src/setjmp/loongarch64/longjmp.S > create mode 100644 src/setjmp/loongarch64/setjmp.S > create mode 100644 src/signal/loongarch64/restore.s > create mode 100644 src/signal/loongarch64/sigsetjmp.s > create mode 100644 src/thread/loongarch64/__set_thread_area.s > create mode 100644 src/thread/loongarch64/__unmapself.s > create mode 100644 src/thread/loongarch64/clone.s > create mode 100644 src/thread/loongarch64/syscall_cp.s >=20 > diff --git a/arch/loongarch64/atomic_arch.h b/arch/loongarch64/atomic_arc= h.h > new file mode 100644 > index 00000000..2225d027 > --- /dev/null > +++ b/arch/loongarch64/atomic_arch.h > @@ -0,0 +1,53 @@ > +#define a_ll a_ll > +static inline int a_ll(volatile int *p) > +{ > + int v; > + __asm__ __volatile__ ( > + "ll.w %0, %1" > + : "=3Dr"(v) > + : "ZC"(*p)); > + return v; > +} > + > +#define a_sc a_sc > +static inline int a_sc(volatile int *p, int v) > +{ > + int r; > + __asm__ __volatile__ ( > + "sc.w %0, %1" > + : "=3Dr"(r), "=3DZC"(*p) > + : "0"(v) : "memory"); > + return r; > +} > + > +#define a_ll_p a_ll_p > +static inline void *a_ll_p(volatile void *p) > +{ > + void *v; > + __asm__ __volatile__ ( > + "ll.d %0, %1" > + : "=3Dr"(v) > + : "ZC"(*(void *volatile *)p)); > + return v; > +} > + > +#define a_sc_p a_sc_p > +static inline int a_sc_p(volatile void *p, void *v) > +{ > + long r; > + __asm__ __volatile__ ( > + "sc.d %0, %1" > + : "=3Dr"(r), "=3DZC"(*(void *volatile *)p) > + : "0"(v) > + : "memory"); > + return r; > +} > + > +#define a_barrier a_barrier > +static inline void a_barrier() > +{ > + __asm__ __volatile__ ("dbar 0" : : : "memory"); > +} > + > +#define a_pre_llsc a_barrier > +#define a_post_llsc a_barrier > diff --git a/arch/loongarch64/bits/alltypes.h.in b/arch/loongarch64/bits/= alltypes.h.in > new file mode 100644 > index 00000000..06db4096 > --- /dev/null > +++ b/arch/loongarch64/bits/alltypes.h.in > @@ -0,0 +1,18 @@ > +#define _Addr long > +#define _Int64 long > +#define _Reg long > + > +#define __BYTE_ORDER 1234 > +#define __LONG_MAX 0x7fffffffffffffffL > + > +#ifndef __cplusplus > +TYPEDEF int wchar_t; > +#endif > + > +TYPEDEF float float_t; > +TYPEDEF double double_t; > + > +TYPEDEF struct { long long __ll; long double __ld; } max_align_t; > + > +TYPEDEF unsigned nlink_t; > +TYPEDEF int blksize_t; > diff --git a/arch/loongarch64/bits/fenv.h b/arch/loongarch64/bits/fenv.h > new file mode 100644 > index 00000000..99e916e1 > --- /dev/null > +++ b/arch/loongarch64/bits/fenv.h > @@ -0,0 +1,20 @@ > +#define FE_INEXACT 0x010000 > +#define FE_UNDERFLOW 0x020000 > +#define FE_OVERFLOW 0x040000 > +#define FE_DIVBYZERO 0x080000 > +#define FE_INVALID 0x100000 > + > +#define FE_ALL_EXCEPT 0x1F0000 > + > +#define FE_TONEAREST 0x000 > +#define FE_TOWARDZERO 0x100 > +#define FE_UPWARD 0x200 > +#define FE_DOWNWARD 0x300 > + > +typedef unsigned fexcept_t; > + > +typedef struct { > + unsigned int __cw; > +} fenv_t; > + > +#define FE_DFL_ENV ((const fenv_t *) -1) > diff --git a/arch/loongarch64/bits/float.h b/arch/loongarch64/bits/float.h > new file mode 100644 > index 00000000..63e86d44 > --- /dev/null > +++ b/arch/loongarch64/bits/float.h > @@ -0,0 +1,16 @@ > +#define FLT_EVAL_METHOD 0 > + > +#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L > +#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L > +#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L > +#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L > + > +#define LDBL_MANT_DIG 113 > +#define LDBL_MIN_EXP (-16381) > +#define LDBL_MAX_EXP 16384 > + > +#define LDBL_DIG 33 > +#define LDBL_MIN_10_EXP (-4931) > +#define LDBL_MAX_10_EXP 4932 > + > +#define DECIMAL_DIG 36 > diff --git a/arch/loongarch64/bits/posix.h b/arch/loongarch64/bits/posix.h > new file mode 100644 > index 00000000..c37b94c1 > --- /dev/null > +++ b/arch/loongarch64/bits/posix.h > @@ -0,0 +1,2 @@ > +#define _POSIX_V6_LP64_OFF64 1 > +#define _POSIX_V7_LP64_OFF64 1 > diff --git a/arch/loongarch64/bits/ptrace.h b/arch/loongarch64/bits/ptrac= e.h > new file mode 100644 > index 00000000..dce2fa51 > --- /dev/null > +++ b/arch/loongarch64/bits/ptrace.h > @@ -0,0 +1,4 @@ > +#define PTRACE_GET_THREAD_AREA 25 > +#define PTRACE_SET_THREAD_AREA 26 > +#define PTRACE_GET_WATCH_REGS 0xd0 > +#define PTRACE_SET_WATCH_REGS 0xd1 > diff --git a/arch/loongarch64/bits/reg.h b/arch/loongarch64/bits/reg.h > new file mode 100644 > index 00000000..2633f39d > --- /dev/null > +++ b/arch/loongarch64/bits/reg.h > @@ -0,0 +1,2 @@ > +#undef __WORDSIZE > +#define __WORDSIZE 64 > diff --git a/arch/loongarch64/bits/setjmp.h b/arch/loongarch64/bits/setjm= p.h > new file mode 100644 > index 00000000..4bfa374d > --- /dev/null > +++ b/arch/loongarch64/bits/setjmp.h > @@ -0,0 +1 @@ > +typedef unsigned long __jmp_buf[23]; > diff --git a/arch/loongarch64/bits/signal.h b/arch/loongarch64/bits/signa= l.h > new file mode 100644 > index 00000000..e1d256e7 > --- /dev/null > +++ b/arch/loongarch64/bits/signal.h > @@ -0,0 +1,92 @@ > +#if defined(_POSIX_SOURCE) || defined(_POSIX_C_SOURCE) \ > + || defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || defined(_BSD_SOURC= E) > + > +#if defined(_XOPEN_SOURCE) || defined(_GNU_SOURCE) || defined(_BSD_SOURC= E) > +#define MINSIGSTKSZ 4096 > +#define SIGSTKSZ 16384 > +#endif > + > +#if defined(_GNU_SOURCE) || defined(_BSD_SOURCE) > +typedef unsigned long greg_t, gregset_t[32]; > + > +struct sigcontext { > + unsigned long sc_pc; > + unsigned long sc_regs[32]; > + unsigned int sc_flags; > + unsigned long sc_extcontext[] __attribute__((__aligned__(16))); > +}; > + > +typedef struct { > + unsigned long __pc; > + unsigned long __gregs[32]; > + unsigned int __flags; > + unsigned long __extcontext[] __attribute__((__aligned__(16))); > +} mcontext_t; > +#else > +typedef struct { > + unsigned long __space[34]; > +} mcontext_t; > +#endif > + > +struct sigaltstack { > + void *ss_sp; > + int ss_flags; > + size_t ss_size; > +}; > + > +typedef struct __ucontext > +{ > + unsigned long __uc_flags; > + struct __ucontext *uc_link; > + stack_t uc_stack; > + sigset_t uc_sigmask; > + long __uc_pad; > + mcontext_t uc_mcontext; > +} ucontext_t; > + > +#define SA_NOCLDSTOP 1 > +#define SA_NOCLDWAIT 2 > +#define SA_SIGINFO 4 > +#define SA_ONSTACK 0x08000000 > +#define SA_RESTART 0x10000000 > +#define SA_NODEFER 0x40000000 > +#define SA_RESETHAND 0x80000000 > +#define SA_RESTORER 0x0 > + > +#endif > + > +#define SIGHUP 1 > +#define SIGINT 2 > +#define SIGQUIT 3 > +#define SIGILL 4 > +#define SIGTRAP 5 > +#define SIGABRT 6 > +#define SIGIOT SIGABRT > +#define SIGBUS 7 > +#define SIGFPE 8 > +#define SIGKILL 9 > +#define SIGUSR1 10 > +#define SIGSEGV 11 > +#define SIGUSR2 12 > +#define SIGPIPE 13 > +#define SIGALRM 14 > +#define SIGTERM 15 > +#define SIGSTKFLT 16 > +#define SIGCHLD 17 > +#define SIGCONT 18 > +#define SIGSTOP 19 > +#define SIGTSTP 20 > +#define SIGTTIN 21 > +#define SIGTTOU 22 > +#define SIGURG 23 > +#define SIGXCPU 24 > +#define SIGXFSZ 25 > +#define SIGVTALRM 26 > +#define SIGPROF 27 > +#define SIGWINCH 28 > +#define SIGIO 29 > +#define SIGPOLL SIGIO > +#define SIGPWR 30 > +#define SIGSYS 31 > +#define SIGUNUSED SIGSYS > +#define _NSIG 65 > diff --git a/arch/loongarch64/bits/stat.h b/arch/loongarch64/bits/stat.h > new file mode 100644 > index 00000000..b7f4221b > --- /dev/null > +++ b/arch/loongarch64/bits/stat.h > @@ -0,0 +1,18 @@ > +struct stat { > + dev_t st_dev; > + ino_t st_ino; > + mode_t st_mode; > + nlink_t st_nlink; > + uid_t st_uid; > + gid_t st_gid; > + dev_t st_rdev; > + unsigned long __pad; > + off_t st_size; > + blksize_t st_blksize; > + int __pad2; > + blkcnt_t st_blocks; > + struct timespec st_atim; > + struct timespec st_mtim; > + struct timespec st_ctim; > + unsigned __unused[2]; > +}; > diff --git a/arch/loongarch64/bits/stdint.h b/arch/loongarch64/bits/stdin= t.h > new file mode 100644 > index 00000000..60c12499 > --- /dev/null > +++ b/arch/loongarch64/bits/stdint.h > @@ -0,0 +1,20 @@ > +typedef int32_t int_fast16_t; > +typedef int32_t int_fast32_t; > +typedef uint32_t uint_fast16_t; > +typedef uint32_t uint_fast32_t; > + > +#define INT_FAST16_MIN INT32_MIN > +#define INT_FAST32_MIN INT32_MIN > + > +#define INT_FAST16_MAX INT32_MAX > +#define INT_FAST32_MAX INT32_MAX > + > +#define UINT_FAST16_MAX UINT32_MAX > +#define UINT_FAST32_MAX UINT32_MAX > + > +#define INTPTR_MIN INT64_MIN > +#define INTPTR_MAX INT64_MAX > +#define UINTPTR_MAX UINT64_MAX > +#define PTRDIFF_MIN INT64_MIN > +#define PTRDIFF_MAX INT64_MAX > +#define SIZE_MAX UINT64_MAX > diff --git a/arch/loongarch64/bits/syscall.h.in b/arch/loongarch64/bits/s= yscall.h.in > new file mode 100644 > index 00000000..0980e533 > --- /dev/null > +++ b/arch/loongarch64/bits/syscall.h.in > @@ -0,0 +1,303 @@ > +#define __NR_io_setup 0 > +#define __NR_io_destroy 1 > +#define __NR_io_submit 2 > +#define __NR_io_cancel 3 > +#define __NR_io_getevents 4 > +#define __NR_setxattr 5 > +#define __NR_lsetxattr 6 > +#define __NR_fsetxattr 7 > +#define __NR_getxattr 8 > +#define __NR_lgetxattr 9 > +#define __NR_fgetxattr 10 > +#define __NR_listxattr 11 > +#define __NR_llistxattr 12 > +#define __NR_flistxattr 13 > +#define __NR_removexattr 14 > +#define __NR_lremovexattr 15 > +#define __NR_fremovexattr 16 > +#define __NR_getcwd 17 > +#define __NR_lookup_dcookie 18 > +#define __NR_eventfd2 19 > +#define __NR_epoll_create1 20 > +#define __NR_epoll_ctl 21 > +#define __NR_epoll_pwait 22 > +#define __NR_dup 23 > +#define __NR_dup3 24 > +#define __NR3264_fcntl 25 > +#define __NR_inotify_init1 26 > +#define __NR_inotify_add_watch 27 > +#define __NR_inotify_rm_watch 28 > +#define __NR_ioctl 29 > +#define __NR_ioprio_set 30 > +#define __NR_ioprio_get 31 > +#define __NR_flock 32 > +#define __NR_mknodat 33 > +#define __NR_mkdirat 34 > +#define __NR_unlinkat 35 > +#define __NR_symlinkat 36 > +#define __NR_linkat 37 > +#define __NR_umount2 39 > +#define __NR_mount 40 > +#define __NR_pivot_root 41 > +#define __NR_nfsservctl 42 > +#define __NR3264_statfs 43 > +#define __NR3264_fstatfs 44 > +#define __NR3264_truncate 45 > +#define __NR3264_ftruncate 46 > +#define __NR_fallocate 47 > +#define __NR_faccessat 48 > +#define __NR_chdir 49 > +#define __NR_fchdir 50 > +#define __NR_chroot 51 > +#define __NR_fchmod 52 > +#define __NR_fchmodat 53 > +#define __NR_fchownat 54 > +#define __NR_fchown 55 > +#define __NR_openat 56 > +#define __NR_close 57 > +#define __NR_vhangup 58 > +#define __NR_pipe2 59 > +#define __NR_quotactl 60 > +#define __NR_getdents64 61 > +#define __NR3264_lseek 62 > +#define __NR_read 63 > +#define __NR_write 64 > +#define __NR_readv 65 > +#define __NR_writev 66 > +#define __NR_pread64 67 > +#define __NR_pwrite64 68 > +#define __NR_preadv 69 > +#define __NR_pwritev 70 > +#define __NR3264_sendfile 71 > +#define __NR_pselect6 72 > +#define __NR_ppoll 73 > +#define __NR_signalfd4 74 > +#define __NR_vmsplice 75 > +#define __NR_splice 76 > +#define __NR_tee 77 > +#define __NR_readlinkat 78 > +#define __NR_sync 81 > +#define __NR_fsync 82 > +#define __NR_fdatasync 83 > +#define __NR_sync_file_range 84 > +#define __NR_timerfd_create 85 > +#define __NR_timerfd_settime 86 > +#define __NR_timerfd_gettime 87 > +#define __NR_utimensat 88 > +#define __NR_acct 89 > +#define __NR_capget 90 > +#define __NR_capset 91 > +#define __NR_personality 92 > +#define __NR_exit 93 > +#define __NR_exit_group 94 > +#define __NR_waitid 95 > +#define __NR_set_tid_address 96 > +#define __NR_unshare 97 > +#define __NR_futex 98 > +#define __NR_set_robust_list 99 > +#define __NR_get_robust_list 100 > +#define __NR_nanosleep 101 > +#define __NR_getitimer 102 > +#define __NR_setitimer 103 > +#define __NR_kexec_load 104 > +#define __NR_init_module 105 > +#define __NR_delete_module 106 > +#define __NR_timer_create 107 > +#define __NR_timer_gettime 108 > +#define __NR_timer_getoverrun 109 > +#define __NR_timer_settime 110 > +#define __NR_timer_delete 111 > +#define __NR_clock_settime 112 > +#define __NR_clock_gettime 113 > +#define __NR_clock_getres 114 > +#define __NR_clock_nanosleep 115 > +#define __NR_syslog 116 > +#define __NR_ptrace 117 > +#define __NR_sched_setparam 118 > +#define __NR_sched_setscheduler 119 > +#define __NR_sched_getscheduler 120 > +#define __NR_sched_getparam 121 > +#define __NR_sched_setaffinity 122 > +#define __NR_sched_getaffinity 123 > +#define __NR_sched_yield 124 > +#define __NR_sched_get_priority_max 125 > +#define __NR_sched_get_priority_min 126 > +#define __NR_sched_rr_get_interval 127 > +#define __NR_restart_syscall 128 > +#define __NR_kill 129 > +#define __NR_tkill 130 > +#define __NR_tgkill 131 > +#define __NR_sigaltstack 132 > +#define __NR_rt_sigsuspend 133 > +#define __NR_rt_sigaction 134 > +#define __NR_rt_sigprocmask 135 > +#define __NR_rt_sigpending 136 > +#define __NR_rt_sigtimedwait 137 > +#define __NR_rt_sigqueueinfo 138 > +#define __NR_rt_sigreturn 139 > +#define __NR_setpriority 140 > +#define __NR_getpriority 141 > +#define __NR_reboot 142 > +#define __NR_setregid 143 > +#define __NR_setgid 144 > +#define __NR_setreuid 145 > +#define __NR_setuid 146 > +#define __NR_setresuid 147 > +#define __NR_getresuid 148 > +#define __NR_setresgid 149 > +#define __NR_getresgid 150 > +#define __NR_setfsuid 151 > +#define __NR_setfsgid 152 > +#define __NR_times 153 > +#define __NR_setpgid 154 > +#define __NR_getpgid 155 > +#define __NR_getsid 156 > +#define __NR_setsid 157 > +#define __NR_getgroups 158 > +#define __NR_setgroups 159 > +#define __NR_uname 160 > +#define __NR_sethostname 161 > +#define __NR_setdomainname 162 > +#define __NR_getrlimit 163 > +#define __NR_setrlimit 164 > +#define __NR_getrusage 165 > +#define __NR_umask 166 > +#define __NR_prctl 167 > +#define __NR_getcpu 168 > +#define __NR_gettimeofday 169 > +#define __NR_settimeofday 170 > +#define __NR_adjtimex 171 > +#define __NR_getpid 172 > +#define __NR_getppid 173 > +#define __NR_getuid 174 > +#define __NR_geteuid 175 > +#define __NR_getgid 176 > +#define __NR_getegid 177 > +#define __NR_gettid 178 > +#define __NR_sysinfo 179 > +#define __NR_mq_open 180 > +#define __NR_mq_unlink 181 > +#define __NR_mq_timedsend 182 > +#define __NR_mq_timedreceive 183 > +#define __NR_mq_notify 184 > +#define __NR_mq_getsetattr 185 > +#define __NR_msgget 186 > +#define __NR_msgctl 187 > +#define __NR_msgrcv 188 > +#define __NR_msgsnd 189 > +#define __NR_semget 190 > +#define __NR_semctl 191 > +#define __NR_semtimedop 192 > +#define __NR_semop 193 > +#define __NR_shmget 194 > +#define __NR_shmctl 195 > +#define __NR_shmat 196 > +#define __NR_shmdt 197 > +#define __NR_socket 198 > +#define __NR_socketpair 199 > +#define __NR_bind 200 > +#define __NR_listen 201 > +#define __NR_accept 202 > +#define __NR_connect 203 > +#define __NR_getsockname 204 > +#define __NR_getpeername 205 > +#define __NR_sendto 206 > +#define __NR_recvfrom 207 > +#define __NR_setsockopt 208 > +#define __NR_getsockopt 209 > +#define __NR_shutdown 210 > +#define __NR_sendmsg 211 > +#define __NR_recvmsg 212 > +#define __NR_readahead 213 > +#define __NR_brk 214 > +#define __NR_munmap 215 > +#define __NR_mremap 216 > +#define __NR_add_key 217 > +#define __NR_request_key 218 > +#define __NR_keyctl 219 > +#define __NR_clone 220 > +#define __NR_execve 221 > +#define __NR3264_mmap 222 > +#define __NR3264_fadvise64 223 > +#define __NR_swapon 224 > +#define __NR_swapoff 225 > +#define __NR_mprotect 226 > +#define __NR_msync 227 > +#define __NR_mlock 228 > +#define __NR_munlock 229 > +#define __NR_mlockall 230 > +#define __NR_munlockall 231 > +#define __NR_mincore 232 > +#define __NR_madvise 233 > +#define __NR_remap_file_pages 234 > +#define __NR_mbind 235 > +#define __NR_get_mempolicy 236 > +#define __NR_set_mempolicy 237 > +#define __NR_migrate_pages 238 > +#define __NR_move_pages 239 > +#define __NR_rt_tgsigqueueinfo 240 > +#define __NR_perf_event_open 241 > +#define __NR_accept4 242 > +#define __NR_recvmmsg 243 > +#define __NR_arch_specific_syscall 244 > +#define __NR_wait4 260 > +#define __NR_prlimit64 261 > +#define __NR_fanotify_init 262 > +#define __NR_fanotify_mark 263 > +#define __NR_name_to_handle_at 264 > +#define __NR_open_by_handle_at 265 > +#define __NR_clock_adjtime 266 > +#define __NR_syncfs 267 > +#define __NR_setns 268 > +#define __NR_sendmmsg 269 > +#define __NR_process_vm_readv 270 > +#define __NR_process_vm_writev 271 > +#define __NR_kcmp 272 > +#define __NR_finit_module 273 > +#define __NR_sched_setattr 274 > +#define __NR_sched_getattr 275 > +#define __NR_renameat2 276 > +#define __NR_seccomp 277 > +#define __NR_getrandom 278 > +#define __NR_memfd_create 279 > +#define __NR_bpf 280 > +#define __NR_execveat 281 > +#define __NR_userfaultfd 282 > +#define __NR_membarrier 283 > +#define __NR_mlock2 284 > +#define __NR_copy_file_range 285 > +#define __NR_preadv2 286 > +#define __NR_pwritev2 287 > +#define __NR_pkey_mprotect 288 > +#define __NR_pkey_alloc 289 > +#define __NR_pkey_free 290 > +#define __NR_statx 291 > +#define __NR_io_pgetevents 292 > +#define __NR_rseq 293 > +#define __NR_kexec_file_load 294 > +#define __NR_pidfd_send_signal 424 > +#define __NR_io_uring_setup 425 > +#define __NR_io_uring_enter 426 > +#define __NR_io_uring_register 427 > +#define __NR_open_tree 428 > +#define __NR_move_mount 429 > +#define __NR_fsopen 430 > +#define __NR_fsconfig 431 > +#define __NR_fsmount 432 > +#define __NR_fspick 433 > +#define __NR_pidfd_open 434 > +#define __NR_clone3 435 > +#define __NR_close_range 436 > +#define __NR_openat2 437 > +#define __NR_pidfd_getfd 438 > +#define __NR_faccessat2 439 > +#define __NR_process_madvise 440 > +#define __NR_fcntl __NR3264_fcntl > +#define __NR_statfs __NR3264_statfs > +#define __NR_fstatfs __NR3264_fstatfs > +#define __NR_truncate __NR3264_truncate > +#define __NR_ftruncate __NR3264_ftruncate > +#define __NR_lseek __NR3264_lseek > +#define __NR_sendfile __NR3264_sendfile > +#define __NR_mmap __NR3264_mmap > +#define __NR_fadvise64 __NR3264_fadvise64 > diff --git a/arch/loongarch64/bits/user.h b/arch/loongarch64/bits/user.h > new file mode 100644 > index 00000000..5a71d132 > --- /dev/null > +++ b/arch/loongarch64/bits/user.h > @@ -0,0 +1,5 @@ > +#define ELF_NGREG 45 > +#define ELF_NFPREG 33 > + > +typedef unsigned long elf_greg_t, elf_gregset_t[ELF_NGREG]; > +typedef double elf_fpreg_t, elf_fpregset_t[ELF_NFPREG]; > diff --git a/arch/loongarch64/crt_arch.h b/arch/loongarch64/crt_arch.h > new file mode 100644 > index 00000000..e0760d9e > --- /dev/null > +++ b/arch/loongarch64/crt_arch.h > @@ -0,0 +1,13 @@ > +__asm__( > +".text \n" > +".global " START "\n" > +".type " START ", @function\n" > +START ":\n" > +" move $fp, $zero\n" > +" move $a0, $sp\n" > +".weak _DYNAMIC\n" > +".hidden _DYNAMIC\n" > +" la.local $a1, _DYNAMIC\n" > +" bstrins.d $sp, $zero, 3, 0\n" > +" b " START "_c\n" > +); > diff --git a/arch/loongarch64/pthread_arch.h b/arch/loongarch64/pthread_a= rch.h > new file mode 100644 > index 00000000..28fbfcd1 > --- /dev/null > +++ b/arch/loongarch64/pthread_arch.h > @@ -0,0 +1,11 @@ > +static inline uintptr_t __get_tp() > +{ > + uintptr_t tp; > + __asm__ __volatile__("move %0, $tp" : "=3Dr"(tp)); > + return tp; > +} > + > +#define TLS_ABOVE_TP > +#define GAP_ABOVE_TP 0 > +#define DTP_OFFSET 0 > +#define MC_PC __pc > diff --git a/arch/loongarch64/reloc.h b/arch/loongarch64/reloc.h > new file mode 100644 > index 00000000..6907de8e > --- /dev/null > +++ b/arch/loongarch64/reloc.h > @@ -0,0 +1,29 @@ > +#if defined __loongarch_double_float > +#define FP_SUFFIX "-lp64d" > +#elif defined __loongarch_single_float > +#define FP_SUFFIX "-lp64f" > +#elif defined __loongarch_soft_float > +#define FP_SUFFIX "-lp64s" > +#endif > + > +#define LDSO_ARCH "loongarch64" FP_SUFFIX > + > +#define TPOFF_K 0 > + > +#define REL_PLT R_LARCH_JUMP_SLOT > +#define REL_COPY R_LARCH_COPY > +#define REL_DTPMOD R_LARCH_TLS_DTPMOD64 > +#define REL_DTPOFF R_LARCH_TLS_DTPREL64 > +#define REL_TPOFF R_LARCH_TLS_TPREL64 > +#define REL_RELATIVE R_LARCH_RELATIVE > +#define REL_SYMBOLIC R_LARCH_64 > + > +#define CRTJMP(pc,sp) __asm__ __volatile__( \ > + "move $sp, %1 ; jr %0" : : "r"(pc), "r"(sp) : "memory" ) > + > +#define GETFUNCSYM(fp, sym, got) __asm__ ( \ > + ".hidden " #sym "\n" \ > + ".align 8 \n" \ > + " la.local $t1, "#sym" \n" \ > + " move %0, $t1 \n" \ > + : "=3Dr"(*(fp)) : : "memory" ) > diff --git a/arch/loongarch64/syscall_arch.h b/arch/loongarch64/syscall_a= rch.h > new file mode 100644 > index 00000000..4d5e1885 > --- /dev/null > +++ b/arch/loongarch64/syscall_arch.h > @@ -0,0 +1,137 @@ > +#define __SYSCALL_LL_E(x) (x) > +#define __SYSCALL_LL_O(x) (x) > + > +#define SYSCALL_CLOBBERLIST \ > + "$t0", "$t1", "$t2", "$t3", \ > + "$t4", "$t5", "$t6", "$t7", "$t8", "memory" > + > +static inline long __syscall0(long n) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0"); > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "=3Dr"(a0) > + : "r"(a7) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall1(long n, long a) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall2(long n, long a, long b) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall3(long n, long a, long b, long c) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + register long a2 __asm__("$a2") =3D c; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1), "r"(a2) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall4(long n, long a, long b, long c, long d) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + register long a2 __asm__("$a2") =3D c; > + register long a3 __asm__("$a3") =3D d; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1), "r"(a2), "r"(a3) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall5(long n, long a, long b, long c, long d, lo= ng e) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + register long a2 __asm__("$a2") =3D c; > + register long a3 __asm__("$a3") =3D d; > + register long a4 __asm__("$a4") =3D e; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall6(long n, long a, long b, long c, long d, lo= ng e, long f) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + register long a2 __asm__("$a2") =3D c; > + register long a3 __asm__("$a3") =3D d; > + register long a4 __asm__("$a4") =3D e; > + register long a5 __asm__("$a5") =3D f; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +static inline long __syscall7(long n, long a, long b, long c, long d, lo= ng e, long f, long g) > +{ > + register long a7 __asm__("$a7") =3D n; > + register long a0 __asm__("$a0") =3D a; > + register long a1 __asm__("$a1") =3D b; > + register long a2 __asm__("$a2") =3D c; > + register long a3 __asm__("$a3") =3D d; > + register long a4 __asm__("$a4") =3D e; > + register long a5 __asm__("$a5") =3D f; > + register long a6 __asm__("$a6") =3D g; > + > + __asm__ __volatile__ ( > + "syscall 0" > + : "+r"(a0) > + : "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5), "r"(a6) > + : SYSCALL_CLOBBERLIST); > + return a0; > +} > + > +#define VDSO_USEFUL > +#define VDSO_CGT_SYM "__vdso_clock_gettime" > +#define VDSO_CGT_VER "LINUX_5.10" > + > +#define IPC_64 0 > diff --git a/configure b/configure > index 0b966ede..93b06287 100755 > --- a/configure > +++ b/configure > @@ -328,6 +328,7 @@ i?86*) ARCH=3Di386 ;; > x86_64-x32*|x32*|x86_64*x32) ARCH=3Dx32 ;; > x86_64-nt64*) ARCH=3Dnt64 ;; > x86_64*) ARCH=3Dx86_64 ;; > +loongarch64*) ARCH=3Dloongarch64 ;; > m68k*) ARCH=3Dm68k ;; > mips64*|mipsisa64*) ARCH=3Dmips64 ;; > mips*) ARCH=3Dmips ;; > @@ -671,6 +672,20 @@ if test "$ARCH" =3D "aarch64" ; then > trycppif __AARCH64EB__ "$t" && SUBARCH=3D${SUBARCH}_be > fi > =20 > +if test "$ARCH" =3D "loongarch64" ; then > +trycppif __loongarch_double_float "$t" && SUBARCH=3D${SUBARCH}-lp64d > +trycppif __loongarch_single_float "$t" && SUBARCH=3D${SUBARCH}-lp64f > +trycppif __loongarch_soft_float "$t" && SUBARCH=3D${SUBARCH}-lp64s > +printf "checking whether compiler support FCSRs... " > +echo "__asm__(\"movfcsr2gr \$t0,\$fcsr0\");" > "$tmpc" > +if $CC -c -o /dev/null "$tmpc" >/dev/null 2>&1 ; then > +printf "yes\n" > +else > +printf "no\n" > +CFLAGS_AUTO=3D"$CFLAGS_AUTO -DBROKEN_LOONGARCH_FCSR_ASM" > +fi > +fi > + > if test "$ARCH" =3D "m68k" ; then > if trycppif "__HAVE_68881__" ; then : ; > elif trycppif "__mcffpu__" ; then SUBARCH=3D"-fp64" > diff --git a/include/elf.h b/include/elf.h > index 23f2c4bc..7114f262 100644 > --- a/include/elf.h > +++ b/include/elf.h > @@ -315,7 +315,8 @@ typedef struct { > #define EM_RISCV 243 > #define EM_BPF 247 > #define EM_CSKY 252 > -#define EM_NUM 253 > +#define EM_LOONGARCH 258 > +#define EM_NUM 259 > =20 > #define EM_ALPHA 0x9026 > =20 > @@ -699,6 +700,11 @@ typedef struct { > #define NT_MIPS_FP_MODE 0x801 > #define NT_MIPS_MSA 0x802 > #define NT_VERSION 1 > +#define NT_LOONGARCH_CPUCFG 0xa00 > +#define NT_LOONGARCH_CSR 0xa01 > +#define NT_LOONGARCH_LSX 0xa02 > +#define NT_LOONGARCH_LASX 0xa03 > +#define NT_LOONGARCH_LBT 0xa04 > =20 > =20 > =20 > @@ -3293,6 +3299,102 @@ enum > #define R_RISCV_SET32 56 > #define R_RISCV_32_PCREL 57 > =20 > +#define EF_LARCH_ABI_MODIFIER_MASK 0x07 > +#define EF_LARCH_ABI_SOFT_FLOAT 0x01 > +#define EF_LARCH_ABI_SINGLE_FLOAT 0x02 > +#define EF_LARCH_ABI_DOUBLE_FLOAT 0x03 > +#define EF_LARCH_OBJABI_V1 0x40 > + > +#define R_LARCH_NONE 0 > +#define R_LARCH_32 1 > +#define R_LARCH_64 2 > +#define R_LARCH_RELATIVE 3 > +#define R_LARCH_COPY 4 > +#define R_LARCH_JUMP_SLOT 5 > +#define R_LARCH_TLS_DTPMOD32 6 > +#define R_LARCH_TLS_DTPMOD64 7 > +#define R_LARCH_TLS_DTPREL32 8 > +#define R_LARCH_TLS_DTPREL64 9 > +#define R_LARCH_TLS_TPREL32 10 > +#define R_LARCH_TLS_TPREL64 11 > +#define R_LARCH_IRELATIVE 12 > +#define R_LARCH_MARK_LA 20 > +#define R_LARCH_MARK_PCREL 21 > +#define R_LARCH_SOP_PUSH_PCREL 22 > +#define R_LARCH_SOP_PUSH_ABSOLUTE 23 > +#define R_LARCH_SOP_PUSH_DUP 24 > +#define R_LARCH_SOP_PUSH_GPREL 25 > +#define R_LARCH_SOP_PUSH_TLS_TPREL 26 > +#define R_LARCH_SOP_PUSH_TLS_GOT 27 > +#define R_LARCH_SOP_PUSH_TLS_GD 28 > +#define R_LARCH_SOP_PUSH_PLT_PCREL 29 > +#define R_LARCH_SOP_ASSERT 30 > +#define R_LARCH_SOP_NOT 31 > +#define R_LARCH_SOP_SUB 32 > +#define R_LARCH_SOP_SL 33 > +#define R_LARCH_SOP_SR 34 > +#define R_LARCH_SOP_ADD 35 > +#define R_LARCH_SOP_AND 36 > +#define R_LARCH_SOP_IF_ELSE 37 > +#define R_LARCH_SOP_POP_32_S_10_5 38 > +#define R_LARCH_SOP_POP_32_U_10_12 39 > +#define R_LARCH_SOP_POP_32_S_10_12 40 > +#define R_LARCH_SOP_POP_32_S_10_16 41 > +#define R_LARCH_SOP_POP_32_S_10_16_S2 42 > +#define R_LARCH_SOP_POP_32_S_5_20 43 > +#define R_LARCH_SOP_POP_32_S_0_5_10_16_S2 44 > +#define R_LARCH_SOP_POP_32_S_0_10_10_16_S2 45 > +#define R_LARCH_SOP_POP_32_U 46 > +#define R_LARCH_ADD8 47 > +#define R_LARCH_ADD16 48 > +#define R_LARCH_ADD24 49 > +#define R_LARCH_ADD32 50 > +#define R_LARCH_ADD64 51 > +#define R_LARCH_SUB8 52 > +#define R_LARCH_SUB16 53 > +#define R_LARCH_SUB24 54 > +#define R_LARCH_SUB32 55 > +#define R_LARCH_SUB64 56 > +#define R_LARCH_GNU_VTINHERIT 57 > +#define R_LARCH_GNU_VTENTRY 58 > +#define R_LARCH_B16 64 > +#define R_LARCH_B21 65 > +#define R_LARCH_B26 66 > +#define R_LARCH_ABS_HI20 67 > +#define R_LARCH_ABS_LO12 68 > +#define R_LARCH_ABS64_LO20 69 > +#define R_LARCH_ABS64_HI12 70 > +#define R_LARCH_PCALA_HI20 71 > +#define R_LARCH_PCALA_LO12 72 > +#define R_LARCH_PCALA64_LO20 73 > +#define R_LARCH_PCALA64_HI12 74 > +#define R_LARCH_GOT_PC_HI20 75 > +#define R_LARCH_GOT_PC_LO12 76 > +#define R_LARCH_GOT64_PC_LO20 77 > +#define R_LARCH_GOT64_PC_HI12 78 > +#define R_LARCH_GOT_HI20 79 > +#define R_LARCH_GOT_LO12 80 > +#define R_LARCH_GOT64_LO20 81 > +#define R_LARCH_GOT64_HI12 82 > +#define R_LARCH_TLS_LE_HI20 83 > +#define R_LARCH_TLS_LE_LO12 84 > +#define R_LARCH_TLS_LE64_LO20 85 > +#define R_LARCH_TLS_LE64_HI12 86 > +#define R_LARCH_TLS_IE_PC_HI20 87 > +#define R_LARCH_TLS_IE_PC_LO12 88 > +#define R_LARCH_TLS_IE64_PC_LO20 89 > +#define R_LARCH_TLS_IE64_PC_HI12 90 > +#define R_LARCH_TLS_IE_HI20 91 > +#define R_LARCH_TLS_IE_LO12 92 > +#define R_LARCH_TLS_IE64_LO20 93 > +#define R_LARCH_TLS_IE64_HI12 94 > +#define R_LARCH_TLS_LD_PC_HI20 95 > +#define R_LARCH_TLS_LD_HI20 96 > +#define R_LARCH_TLS_GD_PC_HI20 97 > +#define R_LARCH_TLS_GD_HI20 98 > +#define R_LARCH_32_PCREL 99 > +#define R_LARCH_RELAX 100 > + > #ifdef __cplusplus > } > #endif > diff --git a/src/fenv/loongarch64/fenv.S b/src/fenv/loongarch64/fenv.S > new file mode 100644 > index 00000000..54064e01 > --- /dev/null > +++ b/src/fenv/loongarch64/fenv.S > @@ -0,0 +1,78 @@ > +#ifndef __loongarch_soft_float > + > +#ifdef BROKEN_LOONGARCH_FCSR_ASM > +#define FCSR $r0 > +#else > +#define FCSR $fcsr0 > +#endif > + > +.global feclearexcept > +.type feclearexcept,@function > +feclearexcept: > + li.w $t0, 0x1f0000 > + and $a0, $a0, $t0 > + movfcsr2gr $t1, FCSR > + andn $t1, $t1, $a0 > + movgr2fcsr FCSR, $t1 > + li.w $a0, 0 > + jr $ra > + > +.global feraiseexcept > +.type feraiseexcept,@function > +feraiseexcept: > + li.w $t0, 0x1f0000 > + and $a0, $a0, $t0 > + movfcsr2gr $t1, FCSR > + or $t1, $t1, $a0 > + movgr2fcsr FCSR, $t1 > + li.w $a0, 0 > + jr $ra > + > +.global fetestexcept > +.type fetestexcept,@function > +fetestexcept: > + li.w $t0, 0x1f0000 > + and $a0, $a0, $t0 > + movfcsr2gr $t1, FCSR > + and $a0, $t1, $a0 > + jr $ra > + > +.global fegetround > +.type fegetround,@function > +fegetround: > + movfcsr2gr $t0, FCSR > + andi $a0, $t0, 0x300 > + jr $ra > + > +.global __fesetround > +.hidden __fesetround > +.type __fesetround,@function > +__fesetround: > + li.w $t0, 0x300 > + and $a0, $a0, $t0 > + movfcsr2gr $t1, FCSR > + andn $t1, $t1, $t0 > + or $t1, $t1, $a0 > + movgr2fcsr FCSR, $t1 > + li.w $a0, 0 > + jr $ra > + > +.global fegetenv > +.type fegetenv,@function > +fegetenv: > + movfcsr2gr $t0, FCSR > + st.w $t0, $a0, 0 > + li.w $a0, 0 > + jr $ra > + > +.global fesetenv > +.type fesetenv,@function > +fesetenv: > + addi.d $t0, $a0, 1 > + beq $t0, $r0, 1f > + ld.w $t0, $a0, 0 > +1: movgr2fcsr FCSR, $t0 > + li.w $a0, 0 > + jr $ra > + > +#endif > diff --git a/src/ldso/loongarch64/dlsym.s b/src/ldso/loongarch64/dlsym.s > new file mode 100644 > index 00000000..26fabcdb > --- /dev/null > +++ b/src/ldso/loongarch64/dlsym.s > @@ -0,0 +1,7 @@ > +.global dlsym > +.hidden __dlsym > +.type dlsym,@function > +dlsym: > + move $a2, $ra > + la.global $t0, __dlsym > + jr $t0 > diff --git a/src/setjmp/loongarch64/longjmp.S b/src/setjmp/loongarch64/lo= ngjmp.S > new file mode 100644 > index 00000000..896d2e26 > --- /dev/null > +++ b/src/setjmp/loongarch64/longjmp.S > @@ -0,0 +1,32 @@ > +.global _longjmp > +.global longjmp > +.type _longjmp,@function > +.type longjmp,@function > +_longjmp: > +longjmp: > + ld.d $ra, $a0, 0 > + ld.d $sp, $a0, 8 > + ld.d $r21,$a0, 16 > + ld.d $fp, $a0, 24 > + ld.d $s0, $a0, 32 > + ld.d $s1, $a0, 40 > + ld.d $s2, $a0, 48 > + ld.d $s3, $a0, 56 > + ld.d $s4, $a0, 64 > + ld.d $s5, $a0, 72 > + ld.d $s6, $a0, 80 > + ld.d $s7, $a0, 88 > + ld.d $s8, $a0, 96 > +#ifndef __loongarch_soft_float > + fld.d $fs0, $a0, 104 > + fld.d $fs1, $a0, 112 > + fld.d $fs2, $a0, 120 > + fld.d $fs3, $a0, 128 > + fld.d $fs4, $a0, 136 > + fld.d $fs5, $a0, 144 > + fld.d $fs6, $a0, 152 > + fld.d $fs7, $a0, 160 > +#endif > + sltui $a0, $a1, 1 > + add.d $a0, $a0, $a1 > + jr $ra > diff --git a/src/setjmp/loongarch64/setjmp.S b/src/setjmp/loongarch64/set= jmp.S > new file mode 100644 > index 00000000..d158a3d2 > --- /dev/null > +++ b/src/setjmp/loongarch64/setjmp.S > @@ -0,0 +1,34 @@ > +.global __setjmp > +.global _setjmp > +.global setjmp > +.type __setjmp,@function > +.type _setjmp,@function > +.type setjmp,@function > +__setjmp: > +_setjmp: > +setjmp: > + st.d $ra, $a0, 0 > + st.d $sp, $a0, 8 > + st.d $r21,$a0, 16 > + st.d $fp, $a0, 24 > + st.d $s0, $a0, 32 > + st.d $s1, $a0, 40 > + st.d $s2, $a0, 48 > + st.d $s3, $a0, 56 > + st.d $s4, $a0, 64 > + st.d $s5, $a0, 72 > + st.d $s6, $a0, 80 > + st.d $s7, $a0, 88 > + st.d $s8, $a0, 96 > +#ifndef __loongarch_soft_float > + fst.d $fs0, $a0, 104 > + fst.d $fs1, $a0, 112 > + fst.d $fs2, $a0, 120 > + fst.d $fs3, $a0, 128 > + fst.d $fs4, $a0, 136 > + fst.d $fs5, $a0, 144 > + fst.d $fs6, $a0, 152 > + fst.d $fs7, $a0, 160 > +#endif > + move $a0, $zero > + jr $ra > diff --git a/src/signal/loongarch64/restore.s b/src/signal/loongarch64/re= store.s > new file mode 100644 > index 00000000..f8e6daeb > --- /dev/null > +++ b/src/signal/loongarch64/restore.s > @@ -0,0 +1,10 @@ > +.global __restore_rt > +.global __restore > +.hidden __restore_rt > +.hidden __restore > +.type __restore_rt,@function > +.type __restore,@function > +__restore_rt: > +__restore: > + li.w $a7, 139 > + syscall 0 > diff --git a/src/signal/loongarch64/sigsetjmp.s b/src/signal/loongarch64/= sigsetjmp.s > new file mode 100644 > index 00000000..992ab1a4 > --- /dev/null > +++ b/src/signal/loongarch64/sigsetjmp.s > @@ -0,0 +1,25 @@ > +.global sigsetjmp > +.global __sigsetjmp > +.type sigsetjmp,@function > +.type __sigsetjmp,@function > +sigsetjmp: > +__sigsetjmp: > + beq $a1, $zero, 1f > + st.d $ra, $a0, 168 > + st.d $s0, $a0, 176 > + move $s0, $a0 > + > + la.global $t0, setjmp > + jirl $ra, $t0, 0 > + > + move $a1, $a0 # Return from 'setjmp' or 'longjmp' > + move $a0, $s0 > + ld.d $ra, $a0, 168 > + ld.d $s0, $a0, 176 > + > +.hidden __sigsetjmp_tail > + la.global $t0, __sigsetjmp_tail > + jr $t0 > +1: > + la.global $t0, setjmp > + jr $t0 > diff --git a/src/thread/loongarch64/__set_thread_area.s b/src/thread/loon= garch64/__set_thread_area.s > new file mode 100644 > index 00000000..ffdd52f1 > --- /dev/null > +++ b/src/thread/loongarch64/__set_thread_area.s > @@ -0,0 +1,7 @@ > +.global __set_thread_area > +.hidden __set_thread_area > +.type __set_thread_area,@function > +__set_thread_area: > + move $tp, $a0 > + move $a0, $zero > + jr $ra > diff --git a/src/thread/loongarch64/__unmapself.s b/src/thread/loongarch6= 4/__unmapself.s > new file mode 100644 > index 00000000..1de334af > --- /dev/null > +++ b/src/thread/loongarch64/__unmapself.s > @@ -0,0 +1,7 @@ > +.global __unmapself > +.type __unmapself, @function > +__unmapself: > + li.d $a7, 215 # call munmap > + syscall 0 > + li.d $a7, 93 # call exit > + syscall 0 > diff --git a/src/thread/loongarch64/clone.s b/src/thread/loongarch64/clon= e.s > new file mode 100644 > index 00000000..db9015e6 > --- /dev/null > +++ b/src/thread/loongarch64/clone.s > @@ -0,0 +1,28 @@ > +#__clone(func, stack, flags, arg, ptid, tls, ctid) > +# a0, a1, a2, a3, a4, a5, a6 > +# sys_clone(flags, stack, ptid, ctid, tls) > +# a0, a1, a2, a3, a4 > + > +.global __clone > +.hidden __clone > +.type __clone,@function > +__clone: > + # Save function pointer and argument pointer on new thread stack > + addi.d $a1, $a1, -16 > + st.d $a0, $a1, 0 # save function pointer > + st.d $a3, $a1, 8 # save argument pointer > + or $a0, $a2, $zero > + or $a2, $a4, $zero > + or $a3, $a6, $zero > + or $a4, $a5, $zero > + ori $a7, $zero, 220 > + syscall 0 # call clone > + > + beqz $a0, 1f # whether child process > + jirl $zero, $ra, 0 # parent process return > +1: > + ld.d $t8, $sp, 0 # function pointer > + ld.d $a0, $sp, 8 # argument pointer > + jirl $ra, $t8, 0 # call the user's function > + ori $a7, $zero, 93 > + syscall 0 # child process exit > diff --git a/src/thread/loongarch64/syscall_cp.s b/src/thread/loongarch64= /syscall_cp.s > new file mode 100644 > index 00000000..0fbc7a47 > --- /dev/null > +++ b/src/thread/loongarch64/syscall_cp.s > @@ -0,0 +1,29 @@ > +.global __cp_begin > +.hidden __cp_begin > +.global __cp_end > +.hidden __cp_end > +.global __cp_cancel > +.hidden __cp_cancel > +.hidden __cancel > +.global __syscall_cp_asm > +.hidden __syscall_cp_asm > +.type __syscall_cp_asm,@function > + > +__syscall_cp_asm: > +__cp_begin: > + ld.w $a0, $a0, 0 > + bnez $a0, __cp_cancel > + move $t8, $a1 # reserve system call number > + move $a0, $a2 > + move $a1, $a3 > + move $a2, $a4 > + move $a3, $a5 > + move $a4, $a6 > + move $a5, $a7 > + move $a7, $t8 > + syscall 0 > +__cp_end: > + jr $ra > +__cp_cancel: > + la.local $t8, __cancel > + jr $t8 > --=20 > 2.37.1 >=20