[musl] [PATCH] arch/riscv*/atomic_arch.h: Check if atomic is supported

[Jesse Taube <mr.bossman075@gmail.com>]

Define a_cas and a_cas_p only if atomic instructions are supported.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
---
 arch/riscv32/atomic_arch.h | 4 ++++
 arch/riscv64/atomic_arch.h | 4 ++++
 2 files changed, 8 insertions(+)

diff --git a/arch/riscv32/atomic_arch.h b/arch/riscv32/atomic_arch.h
index 4d418f63..331ce46e 100644
--- a/arch/riscv32/atomic_arch.h
+++ b/arch/riscv32/atomic_arch.h
@@ -4,6 +4,8 @@ static inline void a_barrier()
 	__asm__ __volatile__ ("fence rw,rw" : : : "memory");
 }
 
+#if defined(__riscv_a) || defined(__riscv_atomic)
+
 #define a_cas a_cas
 static inline int a_cas(volatile int *p, int t, int s)
 {
@@ -19,3 +21,5 @@ static inline int a_cas(volatile int *p, int t, int s)
 		: "memory");
 	return old;
 }
+
+#endif
diff --git a/arch/riscv64/atomic_arch.h b/arch/riscv64/atomic_arch.h
index 0c382588..dac972d2 100644
--- a/arch/riscv64/atomic_arch.h
+++ b/arch/riscv64/atomic_arch.h
@@ -4,6 +4,8 @@ static inline void a_barrier()
 	__asm__ __volatile__ ("fence rw,rw" : : : "memory");
 }
 
+#if defined(__riscv_a) || defined(__riscv_atomic)
+
 #define a_cas a_cas
 static inline int a_cas(volatile int *p, int t, int s)
 {
@@ -36,3 +38,5 @@ static inline void *a_cas_p(volatile void *p, void *t, void *s)
 		: "memory");
 	return old;
 }
+
+#endif
-- 
2.45.2