From: 王洪亮 <wanghongliang@loongson.cn>
To: musl@lists.openwall.com
Subject: Re: [musl] add loongarch64 port
Date: Thu, 24 Mar 2022 09:53:32 +0800 [thread overview]
Message-ID: <290c51ad-724e-7013-1684-f33e5c031b9c@loongson.cn> (raw)
In-Reply-To: <CAK8P3a14Ju1mJMpzpdPGR70emwcOJ3njCbm1Xzj+4iaTcacuoA@mail.gmail.com>
Hi, Arnd
another team responsible for kernel port. I already put this point
to them for reference.
Hongliang Wang
在 2022/3/23 上午4:36, Arnd Bergmann 写道:
> On Tue, Mar 22, 2022 at 8:03 PM Rich Felker <dalias@libc.org> wrote:
>> On Tue, Mar 22, 2022 at 11:52:35AM +0800, 王洪亮 wrote:
>>> diff --git a/arch/loongarch64/bits/signal.h b/arch/loongarch64/bits/signal.h
>>> new file mode 100644
>>> index 00000000..a28ec91a
>>> --- /dev/null
>>> +++ b/arch/loongarch64/bits/signal.h
>>> @@ -0,0 +1,79 @@
>>> [...]
>>> +#define _NSIG 64
>> It was also pointed out to me that this is likely wrong. _NSIG needs
>> to be 1 plus the last signal number, so 65 if there are 64 signals
>> like most archs have. Or, if you kept the mips weirdness, 128 (since
>> mips has 127 signals).
> The kernel port originally used the mips signal handling conventions,
> but I pointed out during the review that this is not a good choice for
> a new architecture.
>
> The version that is currently under review for the kernel uses the
> asm-generic version of all the ABI structures, with the normal 64
> signals.
>
> Arnd
next prev parent reply other threads:[~2022-03-24 1:53 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-22 3:52 王洪亮
2022-03-22 12:59 ` Rich Felker
2022-03-22 15:06 ` Jeffrey Walton
2022-03-22 16:04 ` Rich Felker
2022-03-24 3:01 ` 王洪亮
2022-03-24 2:22 ` 王洪亮
2022-03-22 19:03 ` Rich Felker
2022-03-22 20:36 ` Arnd Bergmann
2022-03-24 1:53 ` 王洪亮 [this message]
2022-03-24 1:35 ` 王洪亮
2022-03-29 8:12 ` [musl] " 王洪亮
2022-03-29 8:26 ` Arnd Bergmann
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