From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.3 required=5.0 tests=MAILING_LIST_MULTI, NICE_REPLY_A,RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 10951 invoked from network); 24 Mar 2022 01:53:48 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 24 Mar 2022 01:53:48 -0000 Received: (qmail 3294 invoked by uid 550); 24 Mar 2022 01:53:46 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 3241 invoked from network); 24 Mar 2022 01:53:45 -0000 To: musl@lists.openwall.com References: <20220322190323.GD7074@brightrain.aerifal.cx> From: =?UTF-8?B?546L5rSq5Lqu?= Message-ID: <290c51ad-724e-7013-1684-f33e5c031b9c@loongson.cn> Date: Thu, 24 Mar 2022 09:53:32 +0800 User-Agent: Mozilla/5.0 (X11; Linux mips64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit Content-Language: en-US X-CM-TRANSID:AQAAf9BxEM8czztiHOUOAA--.40276S3 X-Coremail-Antispam: 1UD129KBjvdXoWrKr1DuF43ArWxAw45ur1ftFb_yoWkGFX_uF ZrCws7Cw45XFsrt3Z7try3WrWxK3WDJryrJ34kKr43XFy5ArWDXFsxt3s5Ary3K3y0krZx WwsxGrn5Kr4a9jkaLaAFLSUrUUUUUb8apTn2vfkv8UJUUUU8Yxn0WfASr-VFAUDa7-sFnT 9fnUUIcSsGvfJTRUUUbxAYjsxI4VW3JwAYFVCjjxCrM7AC8VAFwI0_Jr0_Gr1l1xkIjI8I 6I8E6xAIw20EY4v20xvaj40_Wr0E3s1l1IIY67AEw4v_Jr0_Jr4l8cAvFVAK0II2c7xJM2 8CjxkF64kEwVA0rcxSw2x7M28EF7xvwVC0I7IYx2IY67AKxVW5JVW7JwA2z4x0Y4vE2Ix0 cI8IcVCY1x0267AKxVW8JVWxJwA2z4x0Y4vEx4A2jsIE14v26F4UJVW0owA2z4x0Y4vEx4 A2jsIEc7CjxVAFwI0_Cr1j6rxdM2AIxVAIcxkEcVAq07x20xvEncxIr21l5I8CrVACY4xI 64kE6c02F40Ex7xfMcIj6xIIjxv20xvE14v26r1j6r18McIj6I8E87Iv67AKxVWUJVW8Jw Am72CE4IkC6x0Yz7v_Jr0_Gr1lF7xvr2IY64vIr41lc7I2V7IY0VAS07AlzVAYIcxG8wCY 02Avz4vE-syl42xK82IYc2Ij64vIr41l4I8I3I0E4IkC6x0Yz7v_Jr0_Gr1lx2IqxVAqx4 xG67AKxVWUJVWUGwC20s026x8GjcxK67AKxVWUGVWUWwC2zVAF1VAY17CE14v26r1j6r15 MIIYrxkI7VAKI48JMIIF0xvE2Ix0cI8IcVAFwI0_Jr0_JF4lIxAIcVC0I7IYx2IY6xkF7I 0E14v26r1j6r4UMIIF0xvE42xK8VAvwI8IcIk0rVWrJr0_WFyUJwCI42IY6I8E87Iv67AK xVWUJVW8JwCI42IY6I8E87Iv6xkF7I0E14v26r1j6r4UYxBIdaVFxhVjvjDU0xZFpf9x07 joGQDUUUUU= X-CM-SenderInfo: pzdqwxxrqjzxhdqjqz5rrqw2lrqou0/ Subject: Re: [musl] add loongarch64 port Hi, Arnd another team responsible for kernel port. I already put this point to them for reference. Hongliang Wang 在 2022/3/23 上午4:36, Arnd Bergmann 写道: > On Tue, Mar 22, 2022 at 8:03 PM Rich Felker wrote: >> On Tue, Mar 22, 2022 at 11:52:35AM +0800, 王洪亮 wrote: >>> diff --git a/arch/loongarch64/bits/signal.h b/arch/loongarch64/bits/signal.h >>> new file mode 100644 >>> index 00000000..a28ec91a >>> --- /dev/null >>> +++ b/arch/loongarch64/bits/signal.h >>> @@ -0,0 +1,79 @@ >>> [...] >>> +#define _NSIG 64 >> It was also pointed out to me that this is likely wrong. _NSIG needs >> to be 1 plus the last signal number, so 65 if there are 64 signals >> like most archs have. Or, if you kept the mips weirdness, 128 (since >> mips has 127 signals). > The kernel port originally used the mips signal handling conventions, > but I pointed out during the review that this is not a good choice for > a new architecture. > > The version that is currently under review for the kernel uses the > asm-generic version of all the ABI structures, with the normal 64 > signals. > > Arnd