From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/10203 Path: news.gmane.org!not-for-mail From: "Zhao, Weiming" Newsgroups: gmane.linux.lib.musl.general Subject: Re: build musl for armv7m Date: Wed, 22 Jun 2016 13:37:38 -0700 Message-ID: <34aab271-7305-3376-f5ad-7ae161c93428@codeaurora.org> References: <805971fb5f9b1ee12edab9b7f3e86114@codeaurora.org> <20160614130036.GD10893@brightrain.aerifal.cx> <4858c023-2689-cec7-5335-15c33b8c8b92@codeaurora.org> <20160614163252.GQ22574@port70.net> <0e13c593-33fa-be67-5e73-cec7d7edfe15@codeaurora.org> <20160620195832.GN10893@brightrain.aerifal.cx> <20160622191940.GS10893@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------0AF304E126DC03C518FCB62F" X-Trace: ger.gmane.org 1466627889 15795 80.91.229.3 (22 Jun 2016 20:38:09 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Wed, 22 Jun 2016 20:38:09 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-10216-gllmg-musl=m.gmane.org@lists.openwall.com Wed Jun 22 22:38:09 2016 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1bFouP-0005zF-9w for gllmg-musl@m.gmane.org; Wed, 22 Jun 2016 22:38:01 +0200 Original-Received: (qmail 3731 invoked by uid 550); 22 Jun 2016 20:37:53 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 3710 invoked from network); 22 Jun 2016 20:37:52 -0000 X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.9 required=2.0 tests=ALL_TRUSTED,BAYES_00 autolearn=ham autolearn_force=no version=3.4.0 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 In-Reply-To: <20160622191940.GS10893@brightrain.aerifal.cx> Xref: news.gmane.org gmane.linux.lib.musl.general:10203 Archived-At: This is a multi-part message in MIME format. --------------0AF304E126DC03C518FCB62F Content-Type: text/plain; charset=windows-1252; format=flowed Content-Transfer-Encoding: 7bit How about using the following test? !defined(__thumb__) || (__ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH > 7) Because I think those instructions are ISA related, not just arm/thumb. For example, using -mcpu=cortex-a8 -mthumb, the original code still works. So if only testing __thumb__, the armv7-a thumb mode will fall into the slow path too. On 6/22/2016 12:19 PM, Rich Felker wrote: > On Wed, Jun 22, 2016 at 12:08:13PM -0700, Zhao, Weiming wrote: >> Thanks for reviewing. >> >> I add tests for ARMv7m for memcpy. >> >> For atomics.s, I think the below are equivalent: >> >> ldr ip,1f ==> assembler will computes the offset from current inst to the label >> >> - ldr ip,[pc,ip] ==> here the address to be loaded is current PC + ip >> + add ip,pc,ip ==> here, the PC is the same as above >> + ldr ip,[ip] > In the original code, pc reads as the address of the instruction > following the ".word" mnemonic (2 ARM insns ahead of the current > instruction). In your version, I believe pc reads as the address of > the .word (2 thumb insns ahead of the current insn) which would be > wrong, but I may be wrong; one source I saw suggested that arithmetic > on pc like this was not even defined in thumb mode on some models. > >> But I'm not familiar with the CP15 issue you mentioned. >> So, anyway, I skip the change for atomics.s in this patch. > OK. But just know that you can't expect it to work unless that's > implemented. >> diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S >> index 4db4844..1137f55 100644 >> --- a/src/string/arm/memcpy_le.S >> +++ b/src/string/arm/memcpy_le.S >> @@ -241,7 +241,12 @@ non_congruent: >> beq 2f >> ldr r5, [r1], #4 >> sub r2, r2, #4 >> +#if (__ARM_ARCH_7A || __ARM_ARCH_7R || __ARM_ARCH > 7) >> orr r4, r3, r5, lsl lr >> +#else >> + lsl r4, r5, lr >> + orr r4, r3, r4 >> +#endif > These are not the right conditions. The selection should be made based > on whether the code is being assembled as thumb, not on the ISA > revision level. As written your patch uses the thumb code on all > pre-v7 targets. > Rich -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation --------------0AF304E126DC03C518FCB62F Content-Type: text/plain; charset=UTF-8; name="patch.diff" Content-Transfer-Encoding: 7bit Content-Disposition: attachment; filename="patch.diff" diff --git a/src/setjmp/arm/longjmp.s b/src/setjmp/arm/longjmp.s index e28d8f3..e9b9b32 100644 --- a/src/setjmp/arm/longjmp.s +++ b/src/setjmp/arm/longjmp.s @@ -8,7 +8,9 @@ longjmp: mov ip,r0 movs r0,r1 moveq r0,#1 - ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} + ldmia ip!, {v1,v2,v3,v4,v5,v6,sl,fp} + ldr sp, [ip]! + ldr lr, [ip]! adr r1,1f ldr r2,1f diff --git a/src/setjmp/arm/setjmp.s b/src/setjmp/arm/setjmp.s index 8779163..fd380b0 100644 --- a/src/setjmp/arm/setjmp.s +++ b/src/setjmp/arm/setjmp.s @@ -9,7 +9,9 @@ __setjmp: _setjmp: setjmp: mov ip,r0 - stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp,sp,lr} + stmia ip!,{v1,v2,v3,v4,v5,v6,sl,fp} + str sp, [ip]! + str lr, [ip]! mov r0,#0 adr r1,1f diff --git a/src/string/arm/memcpy_le.S b/src/string/arm/memcpy_le.S index 4db4844..7c61979 100644 --- a/src/string/arm/memcpy_le.S +++ b/src/string/arm/memcpy_le.S @@ -241,7 +241,12 @@ non_congruent: beq 2f ldr r5, [r1], #4 sub r2, r2, #4 +#if !defined(__thumb__) || (__ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH > 7) orr r4, r3, r5, lsl lr +#else + lsl r4, r5, lr + orr r4, r3, r4 +#endif mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 @@ -348,7 +353,12 @@ less_than_thirtytwo: 1: ldr r5, [r1], #4 sub r2, r2, #4 +#if !defined(__thumb__) || (__ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH > 7) orr r4, r3, r5, lsl lr +#else + lsl r4, r5, lr + orr r4, r3, r4 +#endif mov r3, r5, lsr r12 str r4, [r0], #4 cmp r2, #4 --------------0AF304E126DC03C518FCB62F--