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Date: Sat, 21 Oct 2023 12:06:15 +1100 (AEDT)
From: Damian McGuckin <damianm@esi.com.au>
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Subject: Re: [musl] Floating Point Operations Cycles/Latency for ARM + RISC-V
 + POWER10

On Fri, 20 Oct 2023, David Edelsohn wrote:

> Have you looked at the scheduler description for ARM, RISC-V and POWER in
> GCC or LLVM?

No.

Thanks for the pointer - Damian