From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/4541 Path: news.gmane.org!not-for-mail From: Matthew Fernandez Newsgroups: gmane.linux.lib.musl.general Subject: 64-bit atomic ops on 32-bit ARM Date: Thu, 6 Feb 2014 09:56:47 +1100 Message-ID: <52F2C1AF.8020903@nicta.com.au> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="ISO-8859-1"; format=flowed Content-Transfer-Encoding: quoted-printable X-Trace: ger.gmane.org 1391641063 21452 80.91.229.3 (5 Feb 2014 22:57:43 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Wed, 5 Feb 2014 22:57:43 +0000 (UTC) To: Original-X-From: musl-return-4545-gllmg-musl=m.gmane.org@lists.openwall.com Wed Feb 05 23:57:51 2014 Return-path: Envelope-to: gllmg-musl@plane.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1WBBPi-0005kJ-Jm for gllmg-musl@plane.gmane.org; Wed, 05 Feb 2014 23:57:50 +0100 Original-Received: (qmail 7528 invoked by uid 550); 5 Feb 2014 22:57:48 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 7520 invoked from network); 5 Feb 2014 22:57:48 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 X-TM-AS-Product-Ver: SMEX-11.0.0.1191-7.500.1017-20484.001 X-TM-AS-Result: No--11.616100-0.000000-31 X-TM-AS-User-Approved-Sender: Yes X-TM-AS-User-Blocked-Sender: No Xref: news.gmane.org gmane.linux.lib.musl.general:4541 Archived-At: Hi all, The header atomic.h contains a couple of functions for operations on 64-bit= types. Despite their name, these do not appear to be atomic to me. For example: static inline void a_and_64(volatile uint64_t *p, uint64_t v) { union { uint64_t v; uint32_t r[2]; } u =3D { v }; a_and((int *)p, u.r[0]); a_and((int *)p+1, u.r[1]); } Have I misunderstood something or is there some other reason behind their i= mplementation? AIUI on certain ARM platforms there is actually no way to implement atomic 64-bit o= ps without kernel support. If replying, please CC me directly as I'm not on the list. Thanks, Matt ________________________________ The information in this e-mail may be confidential and subject to legal pro= fessional privilege and/or copyright. National ICT Australia Limited accept= s no liability for any damage caused by this email or its attachments.