From: "Stefan O'Rear" <sorear@fastmail.com>
To: musl@lists.openwall.com
Subject: Re: [musl] riscv32 v2
Date: Mon, 07 Sep 2020 06:47:00 -0400 [thread overview]
Message-ID: <68b5e735-45be-413f-8153-cb97dd5967cd@www.fastmail.com> (raw)
In-Reply-To: <e792658a-fbaa-48bd-8704-7f9d2ec5a4ef@www.fastmail.com>
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On Fri, Sep 4, 2020, at 1:48 AM, Stefan O'Rear wrote:
> FAIL src/api/main.exe [status 1]
> FAIL src/functional/fcntl-static.exe [status 1]
> FAIL src/functional/fcntl.exe [status 1]
> FAIL src/functional/ipc_msg-static.exe [status 1]
> FAIL src/functional/ipc_msg.exe [status 1]
> FAIL src/functional/ipc_sem-static.exe [status 1]
> FAIL src/functional/ipc_sem.exe [status 1]
> FAIL src/functional/ipc_shm-static.exe [status 1]
> FAIL src/functional/ipc_shm.exe [status 1]
> FAIL src/functional/strptime-static.exe [status 1]
> FAIL src/functional/strptime.exe [status 1]
> FAIL src/math/fma.exe [status 1]
> FAIL src/math/fmaf.exe [status 1]
> FAIL src/math/powf.exe [status 1]
> FAIL src/regression/malloc-brk-fail-static.exe [status 1]
> FAIL src/regression/malloc-brk-fail.exe [status 1]
> FAIL src/regression/pthread_atfork-errno-clobber-static.exe [status 1]
> FAIL src/regression/pthread_atfork-errno-clobber.exe [status 1]
>
> The fcntl and sysvipc errors do not correspond to any error in x86_64
> and potentially require investigation, although they could be kernel
> configuration issues. x86_64 has a different but overlapping set of
> math errors; qemu is known to not give bit-exact results for RISC-V
> floating point. The malloc, pthread, and src/api/main.exe failures
> match failures on x86_64.
Attached patch reaches test failure parity between riscv32 and riscv64
and will be included in v3.
* gdb HEAD wants ELF_NFPREG, so I set it in bits/user.h to the value
gdb needs. (glibc does #define ELF_NFPREG NFPREG and expects gdb
to define NFPREG. I don't get this.)
* Restore accidentally removed errno setting in waitpid, fixes a gdb
assertion failure.
* Zero IPC_64 because the kernel only recognizes one set of IPC commands.
* Copy the IPC_TIME64 bits from arch/arm/bits to trigger the musl code
for fixing time64 IPC_STAT results. I'm not super happy with this,
maybe there should be a new mechanism in musl for fixing IPC_STAT for
unconditionally-time64 architectures.
* riscv32 _does_ provide both F_GETLK and F_GETLK32; make sure we use
the right one.
-s
[-- Attachment #2: post-v2.diff --]
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diff --git a/arch/riscv32/bits/fcntl.h b/arch/riscv32/bits/fcntl.h
index ecb4d18f..66f84fac 100644
--- a/arch/riscv32/bits/fcntl.h
+++ b/arch/riscv32/bits/fcntl.h
@@ -24,14 +24,15 @@
#define F_SETFD 2
#define F_GETFL 3
#define F_SETFL 4
-#define F_GETLK 5
-#define F_SETLK 6
-#define F_SETLKW 7
#define F_SETOWN 8
#define F_GETOWN 9
#define F_SETSIG 10
#define F_GETSIG 11
+#define F_GETLK 12
+#define F_SETLK 13
+#define F_SETLKW 14
+
#define F_SETOWN_EX 15
#define F_GETOWN_EX 16
diff --git a/arch/riscv32/bits/ipcstat.h b/arch/riscv32/bits/ipcstat.h
new file mode 100644
index 00000000..4f4fcb0c
--- /dev/null
+++ b/arch/riscv32/bits/ipcstat.h
@@ -0,0 +1 @@
+#define IPC_STAT 0x102
diff --git a/arch/riscv32/bits/msg.h b/arch/riscv32/bits/msg.h
new file mode 100644
index 00000000..7bbbb2bf
--- /dev/null
+++ b/arch/riscv32/bits/msg.h
@@ -0,0 +1,18 @@
+struct msqid_ds {
+ struct ipc_perm msg_perm;
+ unsigned long __msg_stime_lo;
+ unsigned long __msg_stime_hi;
+ unsigned long __msg_rtime_lo;
+ unsigned long __msg_rtime_hi;
+ unsigned long __msg_ctime_lo;
+ unsigned long __msg_ctime_hi;
+ unsigned long msg_cbytes;
+ msgqnum_t msg_qnum;
+ msglen_t msg_qbytes;
+ pid_t msg_lspid;
+ pid_t msg_lrpid;
+ unsigned long __unused[2];
+ time_t msg_stime;
+ time_t msg_rtime;
+ time_t msg_ctime;
+};
diff --git a/arch/riscv32/bits/sem.h b/arch/riscv32/bits/sem.h
new file mode 100644
index 00000000..544e3d2a
--- /dev/null
+++ b/arch/riscv32/bits/sem.h
@@ -0,0 +1,18 @@
+struct semid_ds {
+ struct ipc_perm sem_perm;
+ unsigned long __sem_otime_lo;
+ unsigned long __sem_otime_hi;
+ unsigned long __sem_ctime_lo;
+ unsigned long __sem_ctime_hi;
+#if __BYTE_ORDER == __LITTLE_ENDIAN
+ unsigned short sem_nsems;
+ char __sem_nsems_pad[sizeof(long)-sizeof(short)];
+#else
+ char __sem_nsems_pad[sizeof(long)-sizeof(short)];
+ unsigned short sem_nsems;
+#endif
+ long __unused3;
+ long __unused4;
+ time_t sem_otime;
+ time_t sem_ctime;
+};
diff --git a/arch/riscv32/bits/shm.h b/arch/riscv32/bits/shm.h
new file mode 100644
index 00000000..725fb469
--- /dev/null
+++ b/arch/riscv32/bits/shm.h
@@ -0,0 +1,31 @@
+#define SHMLBA 4096
+
+struct shmid_ds {
+ struct ipc_perm shm_perm;
+ size_t shm_segsz;
+ unsigned long __shm_atime_lo;
+ unsigned long __shm_atime_hi;
+ unsigned long __shm_dtime_lo;
+ unsigned long __shm_dtime_hi;
+ unsigned long __shm_ctime_lo;
+ unsigned long __shm_ctime_hi;
+ pid_t shm_cpid;
+ pid_t shm_lpid;
+ unsigned long shm_nattch;
+ unsigned long __pad1;
+ unsigned long __pad2;
+ unsigned long __pad3;
+ time_t shm_atime;
+ time_t shm_dtime;
+ time_t shm_ctime;
+};
+
+struct shminfo {
+ unsigned long shmmax, shmmin, shmmni, shmseg, shmall, __unused[4];
+};
+
+struct shm_info {
+ int __used_ids;
+ unsigned long shm_tot, shm_rss, shm_swp;
+ unsigned long __swap_attempts, __swap_successes;
+};
diff --git a/arch/riscv32/bits/user.h b/arch/riscv32/bits/user.h
index 2da743ea..0d37de0b 100644
--- a/arch/riscv32/bits/user.h
+++ b/arch/riscv32/bits/user.h
@@ -1,5 +1,6 @@
#include <signal.h>
#define ELF_NGREG 32
+#define ELF_NFPREG 33
typedef unsigned long elf_greg_t, elf_gregset_t[ELF_NGREG];
typedef union __riscv_mc_fp_state elf_fpregset_t;
diff --git a/arch/riscv32/syscall_arch.h b/arch/riscv32/syscall_arch.h
index 9e916c76..c507f15f 100644
--- a/arch/riscv32/syscall_arch.h
+++ b/arch/riscv32/syscall_arch.h
@@ -76,3 +76,5 @@ static inline long __syscall6(long n, long a, long b, long c, long d, long e, lo
/* We don't have a clock_gettime function.
#define VDSO_CGT_SYM "__vdso_clock_gettime"
#define VDSO_CGT_VER "LINUX_2.6" */
+
+#define IPC_64 0
diff --git a/arch/riscv64/bits/user.h b/arch/riscv64/bits/user.h
index 2da743ea..0d37de0b 100644
--- a/arch/riscv64/bits/user.h
+++ b/arch/riscv64/bits/user.h
@@ -1,5 +1,6 @@
#include <signal.h>
#define ELF_NGREG 32
+#define ELF_NFPREG 33
typedef unsigned long elf_greg_t, elf_gregset_t[ELF_NGREG];
typedef union __riscv_mc_fp_state elf_fpregset_t;
diff --git a/src/process/waitpid.c b/src/process/waitpid.c
index e5ff27ca..9de4073f 100644
--- a/src/process/waitpid.c
+++ b/src/process/waitpid.c
@@ -3,5 +3,5 @@
pid_t waitpid(pid_t pid, int *status, int options)
{
- return __wait4(pid, status, options, 0, 1);
+ return __syscall_ret(__wait4(pid, status, options, 0, 1));
}
next prev parent reply other threads:[~2020-09-07 10:48 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-09-04 5:48 Stefan O'Rear
2020-09-07 10:47 ` Stefan O'Rear [this message]
2020-09-07 18:06 ` Rich Felker
2020-09-07 21:35 ` Arnd Bergmann
2020-09-07 21:45 ` Rich Felker
2020-09-07 21:58 ` Arnd Bergmann
2020-09-07 22:11 ` Rich Felker
2020-09-07 22:30 ` Arnd Bergmann
2020-09-08 1:02 ` Rich Felker
2020-09-08 7:00 ` Arnd Bergmann
2020-09-07 11:27 ` Stefan O'Rear
2020-09-07 18:09 ` Rich Felker
2020-09-08 1:54 ` Rich Felker
2020-09-09 6:07 ` Rich Felker
2020-09-09 20:28 ` Rich Felker
2020-09-09 21:28 ` Palmer Dabbelt
2020-09-09 21:36 ` Rich Felker
2020-09-09 23:08 ` Palmer Dabbelt
2020-09-10 7:36 ` Arnd Bergmann
2020-09-10 10:01 ` Vincenzo Frascino
2020-09-11 0:08 ` Palmer Dabbelt
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