Re: [musl] loongarch64 atomics not working?

[Leah Neukirchen <leah@vuxu.org>]

lixing <lixing@loongson.cn> writes:

> we checked the objdump binaries for -Os and -O2, the a_cas_p implement
> looks ok for both.
>
> Also, we cross build the musl and mksh with -Os, the binary hang with
> qemu user mode emulation , but not hang in the real hardware.
>
> so, maybe this is a qemu problem, we will let our qemu guys to check
> this problem.

Pretty surely it's a bug in QEMU.  qemu 8.1.5 works with mksh.Os,
qemu 8.2.1 hangs.  I have bisected the issue down to:

commit c5af6628f4be5d30800233e59ba3842ca19a12e6 (HEAD)
Author: Jiajie Chen <c@jia.je>
Date:   Tue Aug 22 09:13:52 2023 +0200

    target/loongarch: Extract make_address_i() helper

Reverting this hunk fixes it:

diff --git a/target/loongarch/insn_trans/trans_atomic.c.inc b/target/loongarch/insn_trans/trans_atomic.c.inc
index fbc081448d..bff3e7a74c 100644
--- a/target/loongarch/insn_trans/trans_atomic.c.inc
+++ b/target/loongarch/insn_trans/trans_atomic.c.inc
@@ -7,8 +7,9 @@ static bool gen_ll(DisasContext *ctx, arg_rr_i *a, MemOp mop)
 {
     TCGv dest = gpr_dst(ctx, a->rd, EXT_NONE);
     TCGv src1 = gpr_src(ctx, a->rj, EXT_NONE);
-    TCGv t0 = make_address_i(ctx, src1, a->imm);
+    TCGv t0 = tcg_temp_new();
 
+    tcg_gen_addi_tl(t0, src1, a->imm);
     tcg_gen_qemu_ld_i64(dest, t0, ctx->mem_idx, mop);
     tcg_gen_st_tl(t0, cpu_env, offsetof(CPULoongArchState, lladdr));
     tcg_gen_st_tl(dest, cpu_env, offsetof(CPULoongArchState, llval));

I think the issue is that make_address_i optimizes the addition away
if a->imm is zero, but that's just from looking at the code for 15min.

hth,
-- 
Leah Neukirchen  <leah@vuxu.org>  https://leahneukirchen.org/