From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 8632 invoked from network); 24 Jul 2020 11:06:31 -0000 Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with ESMTPUTF8; 24 Jul 2020 11:06:31 -0000 Received: (qmail 7742 invoked by uid 550); 24 Jul 2020 11:06:28 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 32189 invoked from network); 24 Jul 2020 10:45:55 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ellerman.id.au; s=201909; t=1595587542; bh=cSDDxsKk+jO/k2dwm07zEZ08Z7nlQ2PpJurgiwDzTaM=; h=From:To:Cc:Subject:In-Reply-To:References:Date:From; b=fP1j0ehPwKKTZ5HN/V0OdYjpbK4V2kPCZefecMyzQANJTB+hA79mDYk5par/rDHUq Uo8NyAmqgFc99Y5JkaTKoiZ4on8iQgaDptXG4ojX681JnFFx5ClWMsBZ4vupz40B69 +8/tKqAELW35pogsBvMORx7uUofX7MO6iq8YxIoa8iwdp1wA9kNZzLO0qXPnNOmpMq zrcbClSoYBFPUsnLy9w5Tl/R+A9Ftqp96MzWgWuuZZze/t2duS8KRSA3Trf9pFud7E ALyi6wNdEHqBgLKfonJnWr1RXCiadKIw3ArysUsWlxIX4OqrM8IGusO2A+vV8uo5p9 JjpH7lGkuD+Ow== From: Michael Ellerman To: Christophe Leroy Cc: linux-api@vger.kernel.org, musl@lists.openwall.com, libc-dev@lists.llvm.org, linuxppc-dev@lists.ozlabs.org, Nicholas Piggin In-Reply-To: <20200723184814.Horde.pk5BO9iFqyGX5D4TW5wqmg1@messagerie.si.c-s.fr> References: <20200611081203.995112-1-npiggin@gmail.com> <20200611081203.995112-3-npiggin@gmail.com> <871rl2ralk.fsf@mpe.ellerman.id.au> <20200723184814.Horde.pk5BO9iFqyGX5D4TW5wqmg1@messagerie.si.c-s.fr> Date: Fri, 24 Jul 2020 20:45:36 +1000 Message-ID: <87v9idp4xb.fsf@mpe.ellerman.id.au> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: [musl] Re: [PATCH 2/2] powerpc/64s: system call support for scv/rfscv instructions Christophe Leroy writes: > Michael Ellerman a =C3=A9crit=C2=A0: > >> Nicholas Piggin writes: >>> diff --git a/arch/powerpc/include/asm/ppc-opcode.h=20=20 >>> b/arch/powerpc/include/asm/ppc-opcode.h >>> index 2a39c716c343..b2bdc4de1292 100644 >>> --- a/arch/powerpc/include/asm/ppc-opcode.h >>> +++ b/arch/powerpc/include/asm/ppc-opcode.h >>> @@ -257,6 +257,7 @@ >>> #define PPC_INST_MFVSRD 0x7c000066 >>> #define PPC_INST_MTVSRD 0x7c000166 >>> #define PPC_INST_SC 0x44000002 >>> +#define PPC_INST_SCV 0x44000001 >> ... >>> @@ -411,6 +412,7 @@ >> ... >>> +#define __PPC_LEV(l) (((l) & 0x7f) << 5) >> >> These conflicted and didn't seem to be used so I dropped them. >> >>> diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c >>> index 5abe98216dc2..161bfccbc309 100644 >>> --- a/arch/powerpc/lib/sstep.c >>> +++ b/arch/powerpc/lib/sstep.c >>> @@ -3378,6 +3382,16 @@ int emulate_step(struct pt_regs *regs,=20=20 >>> struct ppc_inst instr) >>> regs->msr =3D MSR_KERNEL; >>> return 1; >>> >>> + case SYSCALL_VECTORED_0: /* scv 0 */ >>> + regs->gpr[9] =3D regs->gpr[13]; >>> + regs->gpr[10] =3D MSR_KERNEL; >>> + regs->gpr[11] =3D regs->nip + 4; >>> + regs->gpr[12] =3D regs->msr & MSR_MASK; >>> + regs->gpr[13] =3D (unsigned long) get_paca(); >>> + regs->nip =3D (unsigned long) &system_call_vectored_emulate; >>> + regs->msr =3D MSR_KERNEL; >>> + return 1; >>> + >> >> This broke the ppc64e build: >> >> ld: arch/powerpc/lib/sstep.o:(.toc+0x0): undefined reference to=20=20 >> `system_call_vectored_emulate' >> make[1]: *** [/home/michael/linux/Makefile:1139: vmlinux] Error 1 >> >> I wrapped it in #ifdef CONFIG_PPC64_BOOK3S. > > You mean CONFIG_PPC_BOOK3S_64 ? I hope so ... #### ## ####. Will send a fixup. Thanks for noticing. cheers