Re: [musl] [PATCH] Fix RISC-V a_cas inline asm operand sign extension

[Florian Weimer <fweimer@redhat.com>]

* Luís Marques:

> This patch adds an explicit cast to the int arguments passed to the inline asm
> used in the RISC-V's implementation of `a_cas`, to ensure that they are properly
> sign extended to 64 bits. They aren't automatically sign extended by Clang, and
> GCC technically also doesn't guarantee that they will be sign extended.
>
> ---
>  arch/riscv64/atomic_arch.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv64/atomic_arch.h b/arch/riscv64/atomic_arch.h
> index 41ad4d04..0c382588 100644
> --- a/arch/riscv64/atomic_arch.h
> +++ b/arch/riscv64/atomic_arch.h
> @@ -15,7 +15,7 @@ static inline int a_cas(volatile int *p, int t, int s)
>  		"	bnez %1, 1b\n"
>  		"1:"
>  		: "=&r"(old), "=&r"(tmp)
> -		: "r"(p), "r"(t), "r"(s)
> +		: "r"(p), "r"((long)t), "r"((long)s)
>  		: "memory");
>  	return old;
>  }

Are casts in this place really casts, and not merely type assertions?
I think you have to use a temporarily variable or maybe a redundant +,
to change the syntax.

Thanks,
Florian