From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12127 Path: news.gmane.org!.POSTED!not-for-mail From: Michael Clark Newsgroups: gmane.linux.lib.musl.general Subject: Re: Do not use 64 bit division if possible Date: Sun, 26 Nov 2017 13:10:15 +1300 Message-ID: References: <424674f0-8460-7807-7366-a87d8588e8bc@davidgf.es> <9716E0B3-B86C-4CFF-8636-6DE4BAA0D716@mac.com> <5575a0c9-0f53-f8e7-e0dc-6c1ff2b594f7@davidgf.es> <20171125235333.GQ1627@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 (Mac OS X Mail 11.1 \(3445.4.7\)) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Trace: blaine.gmane.org 1511655031 27921 195.159.176.226 (26 Nov 2017 00:10:31 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Sun, 26 Nov 2017 00:10:31 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-12143-gllmg-musl=m.gmane.org@lists.openwall.com Sun Nov 26 01:10:26 2017 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1eIkWg-0006zb-JJ for gllmg-musl@m.gmane.org; Sun, 26 Nov 2017 01:10:26 +0100 Original-Received: (qmail 32561 invoked by uid 550); 26 Nov 2017 00:10:31 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 32539 invoked from network); 26 Nov 2017 00:10:31 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mac.com; s=04042017; t=1511655019; bh=KnFR/KbQsBCgp/WPk3Ct8oDkHCEoJjvSK0mh1oNT2Ng=; h=From:Content-type:MIME-version:Subject:Date:To:Message-id; b=bXUV8htXM4YB31+YpveDjE+ziLqXtTkYr480RIPqp1Rz+s0eyl43g7VM3jGvWd9DS mqeYfAhiFqO1fApGrewB438U9p+cKdON2b4I5BQ8IloV8DtyTTTigtlPi0nZRZnNU7 OE6ZQfp0D+n1rrUsI3KrwOeBI6uaKOr1wSKEeUxoSjjHXBFxAzOLIv6P2cJce7pMKh X75PUTX1xGNe3rulXBr1CVhvE68Hi8lM3J5cFaRxgBgeiUGvazOHH33a4r6kOyzZlW n/YF618i2uoPRJCgo8D3Scutcx0adPgiXkGVeDrH3otsfieIA6V8++DUnlndgWB2Nc 0jsUcaN2Zxc4A== X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2017-11-25_13:,, signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 clxscore=1015 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1711260001 In-reply-to: <20171125235333.GQ1627@brightrain.aerifal.cx> X-Mailer: Apple Mail (2.3445.4.7) Xref: news.gmane.org gmane.linux.lib.musl.general:12127 Archived-At: > On 26/11/2017, at 12:53 PM, Rich Felker wrote: >=20 > On Sun, Nov 26, 2017 at 12:46:56AM +0100, David Guillen Fandos wrote: >> Thanks for your response. >> Please note that PAGE_SIZE is not a constant but an alias to >> libc.page_size which is a variable of type size_t (signed). >> That's why at O1+ gcc doesn't generate a shift. >=20 > Indeed; this varies by arch. Oh, I wasn=E2=80=99t aware of that. >> I also created a patch to include libc.page_shift, but as far as I >> can see no other functions would benefit from it, since there's no >> other divides there (only negations, additions and subtractions). >=20 > Adding infrastructure complexity except in cases where it makes a > significant improvement to size or performance is generally not > desirable. mmap() is one other place where, in principle, division by > PAGE_SIZE might take place, but in practice the size is constant 4096 > or 8192 on all archs. >=20 >> And yeah I agree, a_ctz_l is not exactly inexpensive but I guess it >> is better than full 64 bit signed division (that's why I cast >> unsigned otherwise the shift right is not trivial due to the sign). >=20 > The cost here is more a matter of adding a reading complexity > dependency on musl internals (a_*) where it's not needed. I wonder if > GCC could optimize it if we instead of /PAGE_SIZE wrote > /(PAGE_SIZE&-PAGE_SIZE). Or if we did something like define PAGE_SIZE > as ((libc.page_size&-libc.page_size)=3D=3Dlibc.page_size ? = libc.page_size > : 1/0) so that "PAGE_SIZE is not a power of 2" would become an > unreachable case. Interesting. It seems GCC figures out the division by zero is = unreachable but the (n&-n) expression leads to a power of two, not to a = log2 n so the ctz is still required. - https://cx.rv8.io/g/eHf2Ah One could do so once at initialisation time and add PAGE_SHIFT and on = architectures with variable page sizes do this: #define PAGE_SHIFT libc.page_shift diff --git a/src/env/__libc_start_main.c b/src/env/__libc_start_main.c index 2d758af..f24d10a 100644 --- a/src/env/__libc_start_main.c +++ b/src/env/__libc_start_main.c @@ -29,6 +29,7 @@ void __init_libc(char **envp, char *pn) __hwcap =3D aux[AT_HWCAP]; __sysinfo =3D aux[AT_SYSINFO]; libc.page_size =3D aux[AT_PAGESZ]; + libc.page_shift =3D a_ctz_l(libc.page_size); =20 if (!pn) pn =3D (void*)aux[AT_EXECFN]; if (!pn) pn =3D ""; That isolates the a_ctz_l to one place.=