From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12805 Path: news.gmane.org!.POSTED!not-for-mail From: Michael Clark Newsgroups: gmane.linux.lib.musl.general Subject: Re: Porting to RISC-V Date: Thu, 03 May 2018 08:37:13 +1200 Message-ID: References: <20180502193732.GZ1392@brightrain.aerifal.cx> <20180502194533.GB1392@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 (Mac OS X Mail 11.3 \(3445.6.18\)) Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable X-Trace: blaine.gmane.org 1525293328 16975 195.159.176.226 (2 May 2018 20:35:28 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 2 May 2018 20:35:28 +0000 (UTC) To: musl@lists.openwall.com, Dean Michael Ancajas , Palmer Dabbelt , Rich Felker Original-X-From: musl-return-12821-gllmg-musl=m.gmane.org@lists.openwall.com Wed May 02 22:35:24 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1fDyTC-0004JB-W9 for gllmg-musl@m.gmane.org; Wed, 02 May 2018 22:35:23 +0200 Original-Received: (qmail 13479 invoked by uid 550); 2 May 2018 20:37:31 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 13434 invoked from network); 2 May 2018 20:37:30 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mac.com; s=04042017; t=1525293437; bh=W/rtF6XxOOH0X63CN08UhLnDe63SLeDGsSjD7kjDaxs=; h=From:Content-type:MIME-version:Subject:Date:To:Message-id; b=nOv3PIYiGZ5xiGHM+sV79oO1x4LMZ0zR2dzasFB5QJvxZeSStXhyQIavoao1GsMxv FDeQKIou8KmGttoLf9dsZJTMbT4C09f7U+p8D+K0a8GRKnClceWbLDA/qtrQzZhk/c JQnCRqo/V9DeQJoeX91eoCXz8KzMJIa69PrN0LNZz5acWdZcpUj6Z+MrqdE7iEIO0z xWIoe6FEBOzxNqwi7ryjY1mkA22JXtyknVbLziCObl3KVKKmIJ7RywpbwSip+usdwA 8XHacXTOpDNkTAGcmzpsqELQNWSjd9GBvVjsKQrufAGQgBKDa4zmxmAS3zBTLpx8fJ muzhVcSdkzpkg== X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:,, definitions=2018-05-02_07:,, signatures=0 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 spamscore=0 clxscore=1011 suspectscore=8 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1805020172 In-reply-to: <20180502194533.GB1392@brightrain.aerifal.cx> X-Mailer: Apple Mail (2.3445.6.18) Xref: news.gmane.org gmane.linux.lib.musl.general:12805 Archived-At: > On 3/05/2018, at 7:45 AM, Rich Felker wrote: >=20 > On Wed, May 02, 2018 at 03:40:04PM -0400, Dean Michael Ancajas wrote: >> Can you send a link of the wiki? >=20 > https://wiki.musl-libc.org/ > https://wiki.musl-libc.org/porting.html Here=E2=80=99s a pointer to my fork of Aric Belsito=E2=80=99s tree, = including several fixes to get threads and atomics passing libc-tests. - https://github.com/michaeljclark/musl-riscv This is the list of contributors as far as I know, but I might have to = do a deeper inspection of the git history: Aric Belsito Alex Suykov Michael Clark I=E2=80=99ve talked to Palmer Dabbelt about moving the port to the riscv = github organisation retaining all of the contributor history. Typically = riscv repos are prefixed with riscv- versus suffixed however that is a = minor detail. We=E2=80=99ll need to squash the port into some more = logical commits as there is quite a bit of churn in the history, however = we=E2=80=99ll tag the repo in its current state to keep the contributor = history. Threads and mutexes are working. I need to sync with latest musl and run = libc-tests again and we need to run the tests in RISC-V Linux versus = RISC-V QEMU linux-user. Running against linux-kernel will give more = accurate results compared to QEMU=E2=80=99s linux-user emulation which = may not be 100% accurate. This is easier to do now as there are several = glibc based full Linux distros that can be run in QEMU RISC-V and on = real hardware with networking and block storage. i.e. we can rsync = binaries in over ssh in the QEMU virt machine. Indeed folk have been = running self-hosted GCC bootstraps in the Fedora RISC-V port which has = toolchain packages. Now there is a Debian port, and iirc there may even = be a SUSE port (Palmer?) Here is some recent info on QEMU for RISC-V, which might help with the = porting effort: - https://github.com/riscv/riscv-qemu/wiki - = https://www.sifive.com/blog/2018/04/25/risc-v-qemu-part-2-the-risc-v-qemu-= port-is-upstream/ Here is the last update I sent regarding the RISC-V musl port=E2=80=A6 Issues fixed since picking up GSoC musl-riscv branch: =E2=80=A2 gcc patch to set the musl dynamic linker name (ELF = interp) is upstream =E2=80=A2 /lib/ld-musl-riscv32.so.1 (-mabi=3Dilp32d, = default, hard float) =E2=80=A2 /lib/ld-musl-riscv64.so.1 (-mabi=3Dlp64d, = default, hard float) =E2=80=A2 /lib/ld-musl-riscv32-sf.so.1 (-mabi=3Dilp32, = soft float) =E2=80=A2 /lib/ld-musl-riscv64-sf.so.1 (-mabi=3Dlp64, = soft float) =E2=80=A2 /lib/ld-musl-riscv32-sp.so.1 (-mabi=3Dilp32f, = single precision) =E2=80=A2 /lib/ld-musl-riscv64-sp.so.1 (-mabi=3Dlp64f, = single precision) =E2=80=A2 fixed failing pthread tests. =E2=80=A2 a_cas was deadlocking (updated a_cas in = atomic_a.h, fixed missing inline asm constraint) =E2=80=A2 defined the minimal set of atomics required by = the musl library =E2=80=A2 fixed failing sigaltstack tests (update sigaltstack = and ucontext in signal.h) =E2=80=A2 fixed failing ipc_sem tests (added struct semid_ds in = sem.h) =E2=80=A2 fixed failing stat tests (defined blksize_t and = nlink_t in alltypes.h.in) =E2=80=A2 rename sigcontext __regs to gregs so that gcc would = compile =E2=80=A2 rename _gp to __global_pointer$ in the crt to work = with current binutils =E2=80=A2 change definition of long double to quadruple = precision =E2=80=A2 update syscalls.h.in to use asm-generic syscall = definitions =E2=80=A2 update stat.h to use asm-generic stat definition Remaining issues: =E2=80=A2 rebase to current musl-libc =E2=80=A2 audit arch/riscv32 and arch/riscv64 headers to make = sure they match linux-4.16 =E2=80=A2 check results of tests that are expected to fail = (compare with other architectures) =E2=80=A2 ELF thread local variables are not being initialised =E2=80=A2 tls_init test is failing Note: riscv32 glibc is not yet upstream so the 32-bit ABI is not yet = frozen. Rich, BTW It seems the TLS offset is directly above the thread pointer = (tp). $ cat foo.c __thread int i =3D 42; void foo() { i++; } 0000000000010226 : 10226: 00022703 lw a4,0(tp) # 0 1022a: 2705 addiw a4,a4,1 1022c: 00e22023 sw a4,0(tp) # 0 10230: 8082 ret 0000000000010a7a <__set_thread_area>: 10a7a: 822a mv tp,a0 10a7c: 4501 li a0,0 10a7e: 8082 ret Michael.=