From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/13301 Path: news.gmane.org!.POSTED!not-for-mail From: Michael Clark Newsgroups: gmane.linux.lib.musl.general Subject: Re: Porting to RISC-V Date: Sun, 23 Sep 2018 14:40:45 +1200 Message-ID: References: <20180502193732.GZ1392@brightrain.aerifal.cx> <20180502194533.GB1392@brightrain.aerifal.cx> <20180923004558.GD17995@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 (1.0) Content-Type: multipart/alternative; boundary=Apple-Mail-1142A2D3-A9C6-4615-80B9-9588F4343AD7 Content-Transfer-Encoding: 7bit X-Trace: blaine.gmane.org 1537670338 10912 195.159.176.226 (23 Sep 2018 02:38:58 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Sun, 23 Sep 2018 02:38:58 +0000 (UTC) To: musl@lists.openwall.com, palmer@sifive.com Original-X-From: musl-return-13317-gllmg-musl=m.gmane.org@lists.openwall.com Sun Sep 23 04:38:54 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1g3uIP-0002km-Ln for gllmg-musl@m.gmane.org; Sun, 23 Sep 2018 04:38:53 +0200 Original-Received: (qmail 27687 invoked by uid 550); 23 Sep 2018 02:41:03 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 27653 invoked from network); 23 Sep 2018 02:41:01 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=mac.com; s=04042017; t=1537670449; bh=KRTyslTI48L3XQtCXeos4GULm+eSV5s9kRrK1LMzzqo=; h=From:Content-type:MIME-version:Date:Subject:Message-id:To; b=AyIxlg4RLe+BYW9DXBjK+FpW80M33HWtYHbSgq7azkKY6eq4xGhQKTVCDcGQVTwk0 TVCn6iNiXJBgrBw/X55j9cyqihMwpiga3DrQYAqjDXiHzg/6G9KlVq6Hek3NF8iN00 sLPWTJQJL/SZUnGfqjbGR4TvmBreQX0FjG8x8PMnK3C8AG1bRovJeX/GSyHdbhepVT aUnUMX0D94iv+4oWAQt2D1VmIDoDx662ra6ErQJ1Q0zXf1S7elCEOvuDJ98UBZOeXI AogFqmT52ah9g5QJLP1hOuSCict/0wgYp+hNry5pkg6hmV+4UPl6kHVWPrPfQeQbu8 wZLRuLX81sOmg== X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 suspectscore=8 malwarescore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1809230027 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:,, definitions=2018-09-23_01:,, signatures=0 In-reply-to: <20180923004558.GD17995@brightrain.aerifal.cx> X-Mailer: iPhone Mail (15G77) Xref: news.gmane.org gmane.linux.lib.musl.general:13301 Archived-At: --Apple-Mail-1142A2D3-A9C6-4615-80B9-9588F4343AD7 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable > On 23/09/2018, at 12:45 PM, Rich Felker wrote: >=20 >> On Thu, May 03, 2018 at 08:37:13AM +1200, Michael Clark wrote: >>=20 >>=20 >>> On 3/05/2018, at 7:45 AM, Rich Felker wrote: >>>=20 >>> On Wed, May 02, 2018 at 03:40:04PM -0400, Dean Michael Ancajas wrote: >>>> Can you send a link of the wiki? >>>=20 >>> https://wiki.musl-libc.org/ >>> https://wiki.musl-libc.org/porting.html >>=20 >> Here=E2=80=99s a pointer to my fork of Aric Belsito=E2=80=99s tree, inclu= ding several fixes to get threads and atomics passing libc-tests. >>=20 >> - https://github.com/michaeljclark/musl-riscv >>=20 >> This is the list of contributors as far as I know, but I might have to do= a deeper inspection of the git history: >>=20 >> Aric Belsito >> Alex Suykov >> Michael Clark >>=20 >> I=E2=80=99ve talked to Palmer Dabbelt about moving the port to the riscv g= ithub organisation retaining all of the contributor history. Typically riscv= repos are prefixed with riscv- versus suffixed however that is a minor deta= il. We=E2=80=99ll need to squash the port into some more logical commits as t= here is quite a bit of churn in the history, however we=E2=80=99ll tag the r= epo in its current state to keep the contributor history. >>=20 >> Threads and mutexes are working. I need to sync with latest musl and run l= ibc-tests again and we need to run the tests in RISC-V Linux versus RISC-V Q= EMU linux-user. Running against linux-kernel will give more accurate results= compared to QEMU=E2=80=99s linux-user emulation which may not be 100% accur= ate. This is easier to do now as there are several glibc based full Linux di= stros that can be run in QEMU RISC-V and on real hardware with networking an= d block storage. i.e. we can rsync binaries in over ssh in the QEMU virt mac= hine. Indeed folk have been running self-hosted GCC bootstraps in the Fedora= RISC-V port which has toolchain packages. Now there is a Debian port, and i= irc there may even be a SUSE port (Palmer?) >>=20 >> Here is some recent info on QEMU for RISC-V, which might help with the po= rting effort: >>=20 >> - https://github.com/riscv/riscv-qemu/wiki >> - https://www.sifive.com/blog/2018/04/25/risc-v-qemu-part-2-the-risc-v= -qemu-port-is-upstream/ >>=20 >> Here is the last update I sent regarding the RISC-V musl port=E2=80=A6 >>=20 >> Issues fixed since picking up GSoC musl-riscv branch: >>=20 >> =E2=80=A2 gcc patch to set the musl dynamic linker name (ELF interp) i= s upstream >> =E2=80=A2 /lib/ld-musl-riscv32.so.1 (-mabi=3Dilp32d, default, hard= float) >> =E2=80=A2 /lib/ld-musl-riscv64.so.1 (-mabi=3Dlp64d, default, hard f= loat) >> =E2=80=A2 /lib/ld-musl-riscv32-sf.so.1 (-mabi=3Dilp32, soft float)= >> =E2=80=A2 /lib/ld-musl-riscv64-sf.so.1 (-mabi=3Dlp64, soft float) >> =E2=80=A2 /lib/ld-musl-riscv32-sp.so.1 (-mabi=3Dilp32f, single pre= cision) >> =E2=80=A2 /lib/ld-musl-riscv64-sp.so.1 (-mabi=3Dlp64f, single prec= ision) >> =E2=80=A2 fixed failing pthread tests. >> =E2=80=A2 a_cas was deadlocking (updated a_cas in atomic_a.h, fixe= d missing inline asm constraint) >> =E2=80=A2 defined the minimal set of atomics required by the musl l= ibrary >> =E2=80=A2 fixed failing sigaltstack tests (update sigaltstack and ucon= text in signal.h) >> =E2=80=A2 fixed failing ipc_sem tests (added struct semid_ds in sem.h)= >> =E2=80=A2 fixed failing stat tests (defined blksize_t and nlink_t in a= lltypes.h.in) >> =E2=80=A2 rename sigcontext __regs to gregs so that gcc would compile >> =E2=80=A2 rename _gp to __global_pointer$ in the crt to work with curr= ent binutils >> =E2=80=A2 change definition of long double to quadruple precision >> =E2=80=A2 update syscalls.h.in to use asm-generic syscall definitions >> =E2=80=A2 update stat.h to use asm-generic stat definition >>=20 >> Remaining issues: >>=20 >> =E2=80=A2 rebase to current musl-libc >> =E2=80=A2 audit arch/riscv32 and arch/riscv64 headers to make sure the= y match linux-4.16 >> =E2=80=A2 check results of tests that are expected to fail (compare wi= th other architectures) >> =E2=80=A2 ELF thread local variables are not being initialised >> =E2=80=A2 tls_init test is failing >>=20 >> Note: riscv32 glibc is not yet upstream so the 32-bit ABI is not yet froz= en. >>=20 >> Rich, BTW It seems the TLS offset is directly above the thread pointer (t= p). >>=20 >> $ cat foo.c >> __thread int i =3D 42; >>=20 >> void foo() >> { >> i++; >> } >>=20 >> 0000000000010226 : >> 10226: 00022703 lw a4,0(tp) # 0 >> 1022a: 2705 addiw a4,a4,1 >> 1022c: 00e22023 sw a4,0(tp) # 0 >> 10230: 8082 ret >>=20 >> 0000000000010a7a <__set_thread_area>: >> 10a7a: 822a mv tp,a0 >> 10a7c: 4501 li a0,0 >> 10a7e: 8082 ret >>=20 >> Michael. >=20 > Ping. >=20 > I was hoping to get this merged in 1.1.20, which didn't happen despite > it getting delayed for a long time. Is there a chance of it happening > soon for 1.1.21? Yes. I can bump the priority for this. There hopefully should not be that much more to do on the port to get it in s= hape for upstream. Sorry there have been a lot of things going on so this ha= s fallen through the cracks. There is still the ELF TLS bug, which shouldn=E2=80=99t be hard to fix, but w= e could always mark the port experimental. If it=E2=80=99s in tree; then mor= e folk may be interested in fixing bugs. The code also needs some review. We moved the port to riscv-musl in the RISC-V GitHub organisation [1]. We ne= ed to rebase and squash the tree and write a commit message containing the c= ontributors list. The RISC-V rv32 port isn=E2=80=99t in glibc yet and it may be subject to cha= nge. I need to get a riscv32 Linux kernel running in QEMU so we can do testi= ng against glibc... I=E2=80=99ll have to chat to Palmer about riscv32, see i= f there are any ABI issues we need to be aware of. We can spend some time th= is week... Michael [1] https://github.com/riscv/riscv-musl= --Apple-Mail-1142A2D3-A9C6-4615-80B9-9588F4343AD7 Content-Type: text/html; charset=utf-8 Content-Transfer-Encoding: quoted-printable


On 23/09= /2018, at 12:45 PM, Rich Felker <dalia= s@libc.org> wrote:

= On Thu, May 03, 2018 at 08:37:13AM +1200, Michael Clark wrote:


On 3/05/2018, at 7:45 AM, Rich Felker <dalias@libc.org> wrote:

= On Wed, May 02, 2018 at 03:40:04PM -0400, Dean Michael Ancajas wrote:<= /span>
Can you send a link of the wiki?=
=

https://wiki.musl-libc.org/
https://wiki.musl-libc.org/porting.= html

Here=E2=80=99s a po= inter to my fork of Aric Belsito=E2=80=99s tree, including several fixes to g= et threads and atomics passing libc-tests.

   - ht= tps://github.com/michaeljclark/musl-riscv

<= span>This is the list of contributors as far as I know, but I might have to d= o a deeper inspection of the git history:

   Aric Belsito <lluixhi= @gmail.com>
&= nbsp;  Alex Suykov <alex.su= ykov@gmail.com>
   Michael Clark <m= ichaeljclark@mac.com>

I=E2=80=99ve= talked to Palmer Dabbelt about moving the port to the riscv github organisa= tion retaining all of the contributor history. Typically riscv repos are pre= fixed with riscv- versus suffixed however that is a minor detail. We=E2=80=99= ll need to squash the port into some more logical commits as there is quite a= bit of churn in the history, however we=E2=80=99ll tag the repo in its curr= ent state to keep the contributor history.

Threads and mutexes are working. I need to sync with latest musl and run l= ibc-tests again and we need to run the tests in RISC-V Linux versus RISC-V Q= EMU linux-user. Running against linux-kernel will give more accurate results= compared to QEMU=E2=80=99s linux-user emulation which may not be 100% accur= ate. This is easier to do now as there are several glibc based full Linux di= stros that can be run in QEMU RISC-V and on real hardware with networking an= d block storage. i.e. we can rsync binaries in over ssh in the QEMU virt mac= hine. Indeed folk have been running self-hosted GCC bootstraps in the Fedora= RISC-V port which has toolchain packages. Now there is a Debian port, and i= irc there may even be a SUSE port (Palmer?)

Here is some recent info on QEMU for RISC-V, which might help with the po= rting effort:
=
   - https://github.com/riscv/riscv-qem= u/wiki
  &n= bsp;- https://www.sifive.com/blog/2018/04/25/ris= c-v-qemu-part-2-the-risc-v-qemu-port-is-upstream/

Here is the last update I sent regarding the RISC-V musl port=E2= =80=A6

Issues fixed since picking up GSoC= musl-riscv branch:
<= /span>
   =E2=80=A2= gcc patch to set the musl dynamic linker name (ELF interp) is upstream
      &nb= sp;=E2=80=A2 /lib/ld-musl-riscv32.so.1 (-mabi=3Dilp32d, default, hard float)=
     = ;  =E2=80=A2 /lib/ld-musl-riscv64.so.1 (-mabi=3Dlp64d, default, hard fl= oat)
    &= nbsp;  =E2=80=A2 /lib/ld-musl-riscv32-sf.so.1 (-mabi=3Dilp32, soft floa= t)
    &nb= sp;  =E2=80=A2 /lib/ld-musl-riscv64-sf.so.1 (-mabi=3Dlp64, soft float)<= /span>
     =  =E2=80=A2 /lib/ld-musl-riscv32-sp.so.1 (-mabi=3Dilp32f, single precis= ion)
    &= nbsp;  =E2=80=A2 /lib/ld-musl-riscv64-sp.so.1 (-mabi=3Dlp64f, single pr= ecision)
  &nbs= p;=E2=80=A2 fixed failing pthread tests.
       =E2=80=A2 a_cas was deadlocki= ng (updated a_cas in atomic_a.h, fixed missing inline asm constraint)=
       = ;=E2=80=A2 defined the minimal set of atomics required by the musl library
   =E2=80=A2= fixed failing sigaltstack tests (update sigaltstack and ucontext in signal.= h)
   =E2=80= =A2 fixed failing ipc_sem tests (added struct semid_ds in sem.h)
<= /blockquote>
   =E2=80=A2 fixed fa= iling stat tests (defined blksize_t and nlink_t in alltypes.h.in)
=
   =E2=80=A2 rename s= igcontext __regs to gregs so that gcc would compile
<= blockquote type=3D"cite">    =E2=80=A2 rename _gp to __globa= l_pointer$ in the crt to work with current binutils
<= blockquote type=3D"cite">    =E2=80=A2 change definition of l= ong double to quadruple precision
   =E2=80=A2 update syscalls.h.in to use asm-generic= syscall definitions
=    =E2=80=A2 update stat.h to use asm-generic stat definition

=
Remaining issues:

   =E2=80=A2 rebase to current musl-libc
   =E2=80=A2 audit arch/r= iscv32 and arch/riscv64 headers to make sure they match linux-4.16
   =E2=80=A2 check r= esults of tests that are expected to fail (compare with other architectures)=
   =E2=80= =A2 ELF thread local variables are not being initialised
       =E2=80=A2 tl= s_init test is failing

Note: riscv32 glib= c is not yet upstream so the 32-bit ABI is not yet frozen.

Rich, BTW It seems the TLS offset is directly above the th= read pointer (tp).

   $ cat fo= o.c
   __t= hread int i =3D 42;
<= /span>
   void fo= o()
   {
      &= nbsp;i++;
  &nb= sp;}

   0000000000010226 <f= oo>:
   = ;   10226:    00022703      &nb= sp;       lw    a4,0(tp) # 0 <i>
     &n= bsp;1022a:    2705         = ;           addiw    = a4,a4,1
   = ;   1022c:    00e22023      &nb= sp;       sw    a4,0(tp) # 0 <i>
     &n= bsp;10230:    8082         = ;           ret

   0000000000010a7a <__set_thread_area>:=
     = ; 10a7a:    822a        &n= bsp;           mv    = tp,a0
    &= nbsp; 10a7c:    4501       &nbs= p;            li   &n= bsp;a0,0
  &nbs= p;   10a7e:    8082       =              ret

<= blockquote type=3D"cite">Michael.
=
Ping.

I was hoping to get this me= rged in 1.1.20, which didn't happen despite
it getting delay= ed for a long time. Is there a chance of it happening
soon f= or 1.1.21?

Yes. I can bump the priorit= y for this.

There hopefully should not be that much= more to do on the port to get it in shape for upstream. Sorry there have be= en a lot of things going on so this has fallen through the cracks.

There is still the ELF TLS bug, which shouldn=E2=80=99t be h= ard to fix, but we could always mark the port experimental. If it=E2=80=99s i= n tree; then more folk may be interested in fixing bugs. The code also needs= some review.

We moved the port to riscv-musl in the RISC-V GitHub or= ganisation [1]. We need to rebase and squash the tree and write a= commit message containing the contributors list.

T= he RISC-V rv32 port isn=E2=80=99t in glibc yet and it may be subject to chan= ge. I need to get a riscv32 Linux kernel running in QEMU so we can do testin= g against glibc... I=E2=80=99ll have to chat to Palmer about riscv32, see if= there are any ABI issues we need to be aware of. We can spend some time thi= s week...

Michael

= --Apple-Mail-1142A2D3-A9C6-4615-80B9-9588F4343AD7--