From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/7271 Path: news.gmane.org!not-for-mail From: Roman Titov Newsgroups: gmane.linux.lib.musl.general Subject: Re: GSoC 2015. Porting musl libc to RISC-V project. Proposal help and feedback. Date: Thu, 26 Mar 2015 18:34:24 +1000 Message-ID: References: <1427339523.8364.0@smtp.gmail.com> <20150326051129.GF23507@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: plane.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-Trace: ger.gmane.org 1427358887 22646 80.91.229.3 (26 Mar 2015 08:34:47 GMT) X-Complaints-To: usenet@ger.gmane.org NNTP-Posting-Date: Thu, 26 Mar 2015 08:34:47 +0000 (UTC) To: "musl@lists.openwall.com" Original-X-From: musl-return-7284-gllmg-musl=m.gmane.org@lists.openwall.com Thu Mar 26 09:34:47 2015 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by plane.gmane.org with smtp (Exim 4.69) (envelope-from ) id 1Yb3FO-00044d-3N for gllmg-musl@m.gmane.org; Thu, 26 Mar 2015 09:34:38 +0100 Original-Received: (qmail 23618 invoked by uid 550); 26 Mar 2015 08:34:36 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: Original-Received: (qmail 23599 invoked from network); 26 Mar 2015 08:34:36 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=mime-version:in-reply-to:references:date:message-id:subject:from:to :content-type:content-transfer-encoding; bh=9d78evuteM5n7DMhBaZNLsBEwmHcAe6ICSKc/QJXnfg=; b=f8mnJXIIAmvr9jFkzc4n5en8pfkO1KLUu3Cfk2cIuOKMc2pkVURgv5lmjevGoRb9ZV oQBsF1wLyTiWMB+HriG2zvfdIkmjgC8gJX360muvWgVIaHEd3Qt3WafAXP3TSXcqClYB 44ADd0SNUesA3oYD7rxqm7hzmGjWI6t7QOgJeQ+8+EJSvnBnsphazneb45uu7nV4LH3A YIj1dNathcedbNiwLwlaGUTT05O599ZLC0zulScBP8ZbAaEuKJPWW5LkNpOngCWyQUrm Ipyg8vX0rtPr1qmvdXKHLNIlQLq0loMsiC59+aoO03ETOqBbMwKTKEEjPNbSzM5bArvD J2cQ== X-Received: by 10.152.23.166 with SMTP id n6mr11935346laf.67.1427358864903; Thu, 26 Mar 2015 01:34:24 -0700 (PDT) In-Reply-To: <20150326051129.GF23507@brightrain.aerifal.cx> Xref: news.gmane.org gmane.linux.lib.musl.general:7271 Archived-At: 2015-03-26 15:11 GMT+10:00 Rich Felker : > > Can you clarify the G suffix? > RISC-V ISA is modular. Specification says that only base integer subset is mandatory. At the moment there is RV32I or RV64I bases, and RV128I possible somwhere in the future. Integer base bitness defines overall bitness of resulting ISA, obviously. Above integer base there is also a set of "standard extensions": M - integer multiplication and division, A - atomic instructions, F - single-precision floating point, D - double-precision floating point. Direct quote from ISA spec (last sentence on page 4 continued on page 5): "An integer base plus these four standard extensions (=E2=80=9CIMAFD=E2=80= =9D) is given the abbreviation =E2=80=9CG=E2=80=9D and provides a general-purpose scalar instruction set. RV32G and RV64G are currently the default target of our compiler toolchains." I think this also answers one of your next questions: > > This should not include anything except fenv on soft-float archs. I'm > not clear on whether the proposed port is soft-float, hard-float, or > both, and whether there would be separate ABIs for both or just one > ABI. > G is a default target, so I think we also targeting it. Regards, Roman Titov