From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.1 required=5.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: (qmail 30750 invoked from network); 16 Apr 2020 15:22:25 -0000 Received-SPF: pass (mother.openwall.net: domain of lists.openwall.com designates 195.42.179.200 as permitted sender) receiver=inbox.vuxu.org; client-ip=195.42.179.200 envelope-from= Received: from mother.openwall.net (195.42.179.200) by inbox.vuxu.org with UTF8ESMTPZ; 16 Apr 2020 15:22:25 -0000 Received: (qmail 32531 invoked by uid 550); 16 Apr 2020 15:22:23 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 32513 invoked from network); 16 Apr 2020 15:22:23 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:reply-to:from:date:message-id :subject:to:cc; bh=afYWrqA88mrip3QSImFNIDtSBq4hgCooB2bEshcSTUU=; b=UAQxFCOuT9ZgYVUtPMmapK6yW42AWEzeecRfdoqYQgAMlYT7IccuoWIFd79UZS9vr0 49BJtxFN032qD2wg+LQGYcGpyBVWmPOo7ndyULtUu1YksGq3Q/fsOqcJxaUWkEIgJzsf TrLnXpxk1qW5eVUKZrK1lzo3FjrH/7SLO3KAm9PlazV189HhcYHerShPdDxcqGGMReUE M/qdviq4LJN2hl/blsrvRQlz2VLTCKZCdjJBDPqcYm97sKWWqEx5u7m/qgngzYV9G4Qe +Mx84LxMdTSsj9Tc3YPemzrdXGbvxDUpFxfGNBx6aFhGUtX+vzuat8Ap9Pm6DR79OuQR HGmQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:reply-to :from:date:message-id:subject:to:cc; bh=afYWrqA88mrip3QSImFNIDtSBq4hgCooB2bEshcSTUU=; b=o03ApBEqVuG0rkqbmCyxv4VRV0IweGAIecLqYZOMgnN/tIlTxYvqoMSWjs3X9D+hef pEufL7eMLMfLFh20fLiTn8vY835C+tOp0G+MKwPIn6UfpBw4iBcLyQylwMtifhyrvcrP zfS8zRTZ5ssVrvX9C+J/h0/sSsWjILH8wdRJ4IIexBx4VaDncLVpmWNPkUs5nNfkPfh+ zNqC65r+9Y86pTch7i0sdsI8X4/Hchh9HK22IV+OWktccoPQf/uRMEOW/Sk2VnQVkP+t xsQeQzAWdfrh/m1vXDNDl1baQvZSar4umcZXhXzDqNWOdCDlxhvs3xLyDq+lcY48p+rX UYRg== X-Gm-Message-State: AGi0PuZVKm9VLy7GeXmxua0/rCgChrJSJLSqRZ1seQXhJiqZeCSonr11 hI5MtejuIegjq829H4LpaOxeuMShjwqSSxyf4jZaAMAEiJA= X-Google-Smtp-Source: APiQypJUIhVkThLxveROFDaNJzF1F6H0SxF4p1b4jiq/KAWUdQRgChQRLh3E7aB3e3zkhDSizJovVvQtFX0qWwawXhQ= X-Received: by 2002:a5e:db4d:: with SMTP id r13mr31582305iop.28.1587050530903; Thu, 16 Apr 2020 08:22:10 -0700 (PDT) MIME-Version: 1.0 References: <1586931450.ub4c8cq8dj.astroid@bobo.none> <20200415225539.GL11469@brightrain.aerifal.cx> <1586994952.nnxigedbu2.astroid@bobo.none> In-Reply-To: <1586994952.nnxigedbu2.astroid@bobo.none> From: Jeffrey Walton Date: Thu, 16 Apr 2020 11:21:56 -0400 Message-ID: To: musl@lists.openwall.com Cc: libc-alpha@sourceware.org, libc-dev@lists.llvm.org, linuxppc-dev@lists.ozlabs.org Content-Type: text/plain; charset="UTF-8" Subject: Re: [musl] Powerpc Linux 'scv' system call ABI proposal take 2 On Wed, Apr 15, 2020 at 8:17 PM Nicholas Piggin wrote: > > Excerpts from Rich Felker's message of April 16, 2020 8:55 am: > > On Thu, Apr 16, 2020 at 07:45:09AM +1000, Nicholas Piggin wrote: > >> I would like to enable Linux support for the powerpc 'scv' instruction, > >> as a faster system call instruction. > >> > >> This requires two things to be defined: Firstly a way to advertise to > >> userspace that kernel supports scv, and a way to allocate and advertise > >> support for individual scv vectors. Secondly, a calling convention ABI > >> for this new instruction. > >> ... > > Note that any libc that actually makes use of the new functionality is > > not going to be able to make clobbers conditional on support for it; > > branching around different clobbers is going to defeat any gains vs > > always just treating anything clobbered by either method as clobbered. > > Well it would have to test HWCAP and patch in or branch to two > completely different sequences including register save/restores yes. > You could have the same asm and matching clobbers to put the sequence > inline and then you could patch the one sc/scv instruction I suppose. Could GCC function multiversioning work here? https://gcc.gnu.org/wiki/FunctionMultiVersioning It seems like selecting a runtime version of a function is the sort of thing you are trying to do. Jeff