From mboxrd@z Thu Jan 1 00:00:00 1970 X-Msuck: nntp://news.gmane.org/gmane.linux.lib.musl.general/12560 Path: news.gmane.org!.POSTED!not-for-mail From: Andre McCurdy Newsgroups: gmane.linux.lib.musl.general Subject: Re: clz instruction is unavailable for Thumb1 Date: Tue, 27 Feb 2018 17:26:13 -0800 Message-ID: References: <1799b81c-10d6-c2ac-4411-6ee9808f2356@codeaurora.org> <20180228010110.GS1436@brightrain.aerifal.cx> Reply-To: musl@lists.openwall.com NNTP-Posting-Host: blaine.gmane.org Mime-Version: 1.0 Content-Type: text/plain; charset="UTF-8" X-Trace: blaine.gmane.org 1519781067 8062 195.159.176.226 (28 Feb 2018 01:24:27 GMT) X-Complaints-To: usenet@blaine.gmane.org NNTP-Posting-Date: Wed, 28 Feb 2018 01:24:27 +0000 (UTC) To: musl@lists.openwall.com Original-X-From: musl-return-12576-gllmg-musl=m.gmane.org@lists.openwall.com Wed Feb 28 02:24:23 2018 Return-path: Envelope-to: gllmg-musl@m.gmane.org Original-Received: from mother.openwall.net ([195.42.179.200]) by blaine.gmane.org with smtp (Exim 4.84_2) (envelope-from ) id 1eqqTm-0001m4-DJ for gllmg-musl@m.gmane.org; Wed, 28 Feb 2018 02:24:22 +0100 Original-Received: (qmail 20016 invoked by uid 550); 28 Feb 2018 01:26:26 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Original-Received: (qmail 19994 invoked from network); 28 Feb 2018 01:26:25 -0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to; bh=VZKhG4rdMzcgeCdM2xzXDSm9tQeG+PZOHBtnJ2Sy90o=; b=NSZ4JMru3F+nAUoUXtT1aLbnZOkHaqIZUMnwbcOZMPWyO3Gy1HIkSq1svXGfQgCv7+ 2CVNFELNcj9toc5zz4ZvcU/Hk6yrsJzCUedNmOFJAalpL4NyR7hG7NTataWm41bWzgWO YNeN3W9x7Za37zep5m7yk2C0LOz2G0b93H0zkCuKzfWwEuYV/IDRQEjE7JVlrFsNqfHj KTgMW65PCQc3zxVDy/nzIvR968ukPDKAu0RBmMiUBKZaUb+or33yVnMxm5SlBTqv9JoT K5VXY3QIOUS8eEH/qf6HGhM5M6b3pY4CFT8qXMX2P4CuO802ea9poWmnJWGy9N3Tkp0b 3Llg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to; bh=VZKhG4rdMzcgeCdM2xzXDSm9tQeG+PZOHBtnJ2Sy90o=; b=Huwyeg8CI49u2D53P+i0y3YB86tYfMzSPmuq6cpYQFa+e9SBVfUCYTlBaPNeRfCIe2 i4OVjmWw/VryJNiytsHDun291Qeg+MLKuGHIHgxJP64IC9eIWyN97phZLRyidyUPBZHL yq3cMO8qG2eRx3JE1+4AfiLHJOgCXjHKBW6LLF9ucXXZZhiA3nZapBShqu55hyNDDla+ EP6S4nDUBNHFSaNB+ECI05X7W3xLCHgKJtkRmTc6qcmZHS8dPv2FrKPYt6eqSEbIHvXO Ed645S97Jl+0cBvrdOzG5V3vGCzLk384Sc4U6D6IyBpBiVkbdx7R65cWh4N0E7UIqCX6 5qVQ== X-Gm-Message-State: APf1xPA8s0MxlBOFlrzF4MGH9qDWEGX/XJsHVpsB6flS/DByFGERnLBM HZmz/3sWHp1h5OhSjjR65bBpoLAaf3V/YlmIzPAt7g== X-Google-Smtp-Source: AG47ELtXHegL6QXOgfgqTQ8YNaEq6jYJCBytIuLWAqNWp1VIaOhYTM9i0DDU6kdB+rVsZJqGduMJxHJHg8TDRow5tEU= X-Received: by 10.223.177.194 with SMTP id r2mr11977169wra.89.1519781174312; Tue, 27 Feb 2018 17:26:14 -0800 (PST) In-Reply-To: <20180228010110.GS1436@brightrain.aerifal.cx> Xref: news.gmane.org gmane.linux.lib.musl.general:12560 Archived-At: On Tue, Feb 27, 2018 at 5:01 PM, Rich Felker wrote: > On Tue, Feb 27, 2018 at 04:37:15PM -0800, Andre McCurdy wrote: >> On Tue, Feb 27, 2018 at 4:03 PM, Zhao, Weiming wrote: >> > In arch/arm/atomic_arch.h, it checks for __ARM_ARCH >= 5, which is not >> > sufficient. >> > >> > for example, for armv6-m, it only support Thumb1, which doesn't include clz. >> > >> > Suggest to check if it's building for thumb1: >> >> Musl does not currently support Thumb 1. > > I forget what the situation with v6-m is, and whether/how it could be > supportable. Is it really thumb1 or some thumb2 subset that fills > deficiencies? It's Thumb1 plus BL, DMB, DSB, ISB, MRS and MSR from Thumb2. > My recollection was that thumb1 lacks atomics, barriers, > thread-pointer loading, and maybe even syscalls, and since the > kuser_helper addresses are arm addresses, you can't even use them to > get the missing functionality. > > Rich > > >> > diff --git a/arch/arm/atomic_arch.h b/arch/arm/atomic_arch.h >> > index c5c56f8..e3cb66a 100644 >> > --- a/arch/arm/atomic_arch.h >> > +++ b/arch/arm/atomic_arch.h >> > @@ -82,7 +82,7 @@ static inline void a_crash() >> > : : : "memory"); >> > } >> > >> > -#if __ARM_ARCH >= 5 >> > +#if __ARM_ARCH >= 5 && !(defined(__thumb__) && !defined(__thumb2)) >> > >> > >> > >> > -- >> > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by >> > The Linux Foundation >> >