From mboxrd@z Thu Jan  1 00:00:00 1970
X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org
X-Spam-Level: 
X-Spam-Status: No, score=-3.4 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,
	DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,
	RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no
	version=3.4.4
Received: (qmail 4424 invoked from network); 17 Nov 2020 11:05:38 -0000
Received: from mother.openwall.net (195.42.179.200)
  by inbox.vuxu.org with ESMTPUTF8; 17 Nov 2020 11:05:38 -0000
Received: (qmail 25867 invoked by uid 550); 17 Nov 2020 11:03:51 -0000
Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm
Precedence: bulk
List-Post: <mailto:musl@lists.openwall.com>
List-Help: <mailto:musl-help@lists.openwall.com>
List-Unsubscribe: <mailto:musl-unsubscribe@lists.openwall.com>
List-Subscribe: <mailto:musl-subscribe@lists.openwall.com>
List-ID: <musl.lists.openwall.com>
Reply-To: musl@lists.openwall.com
Received: (qmail 17498 invoked from network); 17 Nov 2020 09:44:39 -0000
DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;
	s=default; t=1605606267;
	bh=EzfJWfd4FslxWfrrhnolx6FKmthW740RbPk39Y1h4bs=;
	h=References:In-Reply-To:From:Date:Subject:To:From;
	b=HXUbER4DQJvdb6xku9l9YGkI1eAGW6+lYiN+YQ3/shWc2hyZhGB3XGO+PHx2sTLkg
	 J783qBb9OlRjHKVgLgR8TkKEgEaOa2ydN+sBvbJJhGofHlfT0MPRXyB892Kk6kH1ez
	 Q4a/qptCNd2cUNoeoA8DMaz2LYlC3WGJ+WzgHYmw=
X-Gm-Message-State: AOAM5316obfDmXNRHoEvpwLYXYUbdQ5OMjlrd20gQz69PWSwNEx451Oe
	KgoKlIMcnyhKERQySI3d4G19R+nn8AvOj2LJkCU=
X-Google-Smtp-Source: ABdhPJz1pWOFoD0Rp0ujoAdRI3t63r7ReDamJEEzoYOG8VcEyaJxANCy3Y6rZWyl+VRm0ugBq40lvY4z1P56wHLOf8M=
X-Received: by 2002:a9d:65d5:: with SMTP id z21mr2231770oth.251.1605606266833;
 Tue, 17 Nov 2020 01:44:26 -0800 (PST)
MIME-Version: 1.0
References: <20201117040951.GA9668@brightrain.aerifal.cx> <20201117083946.GB12665@APC301.andestech.com>
In-Reply-To: <20201117083946.GB12665@APC301.andestech.com>
From: Arnd Bergmann <arnd@kernel.org>
Date: Tue, 17 Nov 2020 10:44:11 +0100
X-Gmail-Original-Message-ID: <CAK8P3a2e55YJDKP=T0-OZbziOM2GbBOh+-t2H1=rNETP=k=swQ@mail.gmail.com>
Message-ID: <CAK8P3a2e55YJDKP=T0-OZbziOM2GbBOh+-t2H1=rNETP=k=swQ@mail.gmail.com>
To: musl@lists.openwall.com
Content-Type: text/plain; charset="UTF-8"
Subject: Re: [musl] musl CI?

On Tue, Nov 17, 2020 at 9:40 AM Ruinland ChuanTzu Tsai
<ruinland@andestech.com> wrote:
>
> Oops, I forgot to append the reference link in the end of last email.
> The QEMU acceptance test matrix is here :
> https://wiki.qemu.org/Testing/Acceptance
>
> For MIPS32, I'm not quite sure which ones are o32 and which ones are
> n32. But I guess it won't take long to figure out.

All 64-bit processors can run both o32 and n32 user space in compat mode
using a 64-bit kernel, but 32-bit kernels can only run o32 user space,
and the n32 user space (on 64-bit kernels) is rarely used in practice.

The 'nanomips' target uses an incompatible instruction set and ABI that
is supported by neither mainline kernels nor musl. There were patches
for it a few years ago, but I don't think any actual products running
Linux were built around the i7200 core, so it doesn't matter.

      Arnd