From: Andre Renaud <andre@bluewatersys.com>
To: musl@lists.openwall.com
Subject: Re: Re: [PATCH] Added ARM optimised memcpy implementation
Date: Sun, 3 Mar 2013 09:28:23 +1300 [thread overview]
Message-ID: <CAPfzE3ZA5i1Ag75CaZRTCa_pvf9-=7kPmLhE6RZt+ZucD4N46w@mail.gmail.com> (raw)
In-Reply-To: <20130301072617.GP6181@port70.net>
On 1 March 2013 20:26, Szabolcs Nagy <nsz@port70.net> wrote:
> * nwmcsween@gmail.com <nwmcsween@gmail.com> [2013-02-28 19:14:28 -0800]:
>> Hmm what does this do that builtins cannot? What I'm asking is why is this more preformant than preload + word-at-a-time.
>>
>
> musl uses naive memcpy if src and dst are not congruent (src%4 != dst%4)
>
> the android asm takes care of that by fetching a 32bytes
> from src into registers and dumping it into dst with
> apropriate shifts
>
> and in the congruent case 32byte alignment is used (cacheline aligned)
It also takes advantage of the arm load/store multiple instructions,
allowing it to manipulate up to 8 32-bit words with a single
instruction.
Regards,
Andre
next prev parent reply other threads:[~2013-03-02 20:28 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2013-03-01 1:24 Andre Renaud
2013-03-01 1:27 ` Andre Renaud
2013-03-01 3:14 ` nwmcsween
2013-03-01 7:26 ` Szabolcs Nagy
2013-03-02 20:28 ` Andre Renaud [this message]
2013-03-07 21:48 ` Andre Renaud
2013-03-08 8:24 ` Szabolcs Nagy
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