From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.4 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI, RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H5,RCVD_IN_MSPIKE_WL, RCVD_IN_ZEN_BLOCKED_OPENDNS,URIBL_ZEN_BLOCKED_OPENDNS autolearn=ham autolearn_force=no version=3.4.4 Received: from second.openwall.net (second.openwall.net [193.110.157.125]) by inbox.vuxu.org (Postfix) with SMTP id DFF8221494 for ; Thu, 25 Sep 2025 17:31:26 +0200 (CEST) Received: (qmail 32595 invoked by uid 550); 25 Sep 2025 15:31:21 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com x-ms-reactions: disallow Received: (qmail 32531 invoked from network); 25 Sep 2025 15:31:21 -0000 X-Virus-Scanned: SPAM Filter at disroot.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=disroot.org; s=mail; t=1758814271; bh=6UIYk+eThWw6I3cBBy02pW+FOomHKbSHqrME+2k9Fp8=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=cIaBWptS56m/7QgrrTcnQbXm3USd7saxhiXIXHwgbbahi/TAAo174XHqtps+KI62+ XXOyBqhMehl3g37o6P/Om0IgXtz17gNnSg4MJH/DIKCbHmzKXeLFUUwX1ClimAKvRi an+uY81n9IsXPLB2i35qIYB1YSTFcF0N/SIoXMQ6MT+1vC7XXhs4ooRnOV3znK8skb Hdh8tfdR+WiQcWpLq+711vfxqoPbBlDnZil4OgCKKcHCy9opXZzXSnt3In/DW6Ng0s 1M39gEibwsUIpldXg+A8xfr9o/uB5cEORQGMUNvdLqhXrADONHRd5aToWN6G8G/Ox3 j/2kMl6u0zExQ== Date: Thu, 25 Sep 2025 15:30:58 +0000 From: Yao Zi To: musl@lists.openwall.com Cc: pincheng.plct@isrc.iscas.ac.cn Message-ID: References: <20250925131557.8907-1-pincheng.plct@isrc.iscas.ac.cn> <20250925131557.8907-2-pincheng.plct@isrc.iscas.ac.cn> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250925131557.8907-2-pincheng.plct@isrc.iscas.ac.cn> Subject: Re: [musl] [PATCH 1/1] riscv64: optimize memset implementation with vector extension On Thu, Sep 25, 2025 at 09:15:57PM +0800, Pincheng Wang wrote: > Use head-tail filling strategy for small sizes and dynamic vsetvli > approach for vector loops to reduce branch overhead. Add conditional > compilation to fall back to scalar implementation when __riscv_vector is > not available. > > Signed-off-by: Pincheng Wang > --- > src/string/riscv64/memset.S | 101 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 101 insertions(+) > create mode 100644 src/string/riscv64/memset.S > > diff --git a/src/string/riscv64/memset.S b/src/string/riscv64/memset.S > new file mode 100644 > index 00000000..5fc6ee14 > --- /dev/null > +++ b/src/string/riscv64/memset.S > @@ -0,0 +1,101 @@ > +#ifdef __riscv_vector I don't think musl is built with V extension specified in march on RISC-V platforms by default. Does this patch only benefit builds that "-march=rv64gcv" is manually specified in CFLAGS? Furthermore, having RVV available at compilation-time doesn't mean it's available at runtime. This effectively raises the baseline for RISC-V platforms from RV64GC (or even lower) to RV64GCV, where the latter isn't implied by the mostly-adapted RVA20 profile. Best regards, Yao Zi