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ad534f2b4af0e5c2bbd9138fc7e1a68401cea787 blob 999 bytes (raw)

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#define a_ll a_ll
static inline int a_ll(volatile int *p)
{
	int v;
#if __mips_isa_rev < 6
	__asm__ __volatile__ (
		".set push ; .set mips2\n\t"
		"ll %0, %1"
		"\n\t.set pop"
		: "=r"(v) : "m"(*p));
#else
	__asm__ __volatile__ (
		"ll %0, %1"
		: "=r"(v) : "ZC"(*p));
#endif
	return v;
}

#define a_sc a_sc
static inline int a_sc(volatile int *p, int v)
{
	int r;
#if __mips_isa_rev < 6
	__asm__ __volatile__ (
		".set push ; .set mips2\n\t"
		"sc %0, %1"
		"\n\t.set pop"
		: "=r"(r), "=m"(*p) : "0"(v) : "memory");
#else
	__asm__ __volatile__ (
		"sc %0, %1"
		: "=r"(r), "=ZC"(*p) : "0"(v) : "memory");
#endif
	return r;
}

#define a_barrier a_barrier
static inline void a_barrier()
{
#if __mips_isa_rev < 2
	/* mips2 sync, but using too many directives causes
	 * gcc not to inline it, so encode with .long instead. */
	__asm__ __volatile__ (".long 0xf" : : : "memory");
#else
	__asm__ __volatile__ ("sync" : : : "memory");
#endif
}

#define a_pre_llsc a_barrier
#define a_post_llsc a_barrier
debug log:

solving ad534f2 ...
found ad534f2 in https://inbox.vuxu.org/musl/20160329021927.GK21636@brightrain.aerifal.cx/
found ce2823b in https://git.vuxu.org/mirror/musl/
preparing index
index prepared:
100644 ce2823b8f42cdb77580915e9be0eebca4ae7f15c	arch/mips/atomic_arch.h

applying [1/1] https://inbox.vuxu.org/musl/20160329021927.GK21636@brightrain.aerifal.cx/
diff --git a/arch/mips/atomic_arch.h b/arch/mips/atomic_arch.h
index ce2823b..ad534f2 100644

Checking patch arch/mips/atomic_arch.h...
Applied patch arch/mips/atomic_arch.h cleanly.

index at:
100644 ad534f2b4af0e5c2bbd9138fc7e1a68401cea787	arch/mips/atomic_arch.h

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