From: Damian McGuckin <damianm@esi.com.au>
To: musl@lists.openwall.com
Subject: Re: [musl] Considering x86-64 fenv.s to C
Date: Wed, 5 Feb 2020 12:32:41 +1100 (AEDT) [thread overview]
Message-ID: <alpine.LRH.2.02.2002051144080.24229@key0.esi.com.au> (raw)
In-Reply-To: <20200203145030.GP1663@brightrain.aerifal.cx>
Sort of style question. No rush at replying.
As I read it, and I could be wrong, the assumptions on the FENV interface
is that excepts/exceptions fit into an int. MUSL takes this further and
then assumes that these are in the 31 least significant bits of floating
point exception registers.
That works for all known architectures, including Sparc and Itanium.
Mind you, an 'fexcept_t' may be an unsigned long but it is still just an
image of the status register and no architecture has anything which is of
interest to FENV stuck up there in the sign bit.
This MUSL assumption would appear to also be the case for the control
register where the rounding bits appear (which more often than not is the
same register as the status register).
However, the raw bit mask encroaches on the sign bit for a Sparc. And yes,
MUSL does not support Sparc. But I assume if Sparc did it, some hardware
designer may try it into the future for some new chip that MUSL does want
to support (although I see no evidence of that). The user-space rounding
bits fed to fesetrounding() and retrieved from fegetrounding() for a Sparc
are small integers which are shifted into (and out of) their bit position
within the register in a BSD implementation. I have not figured out how
OpenSolaris/Illumnos does it.
Now, I
a) Normally avoid using signed quantities when working with bit
masks as such handling was not always predictable in the past. So
using signed quantities for bit operations is not something with
which I have loads of experience.
b) Am trying to use consistent processing for the status and control
registers because they are often one and the same. And I also want
to cover all eventualities.
Do I just stick with working with (signed) int's as MUSL does currently or
do I try and make this generic code a reference implementation that goes
beyond usefulness in just a Linux environment and the architectures that
MUSL does support. Is this overcomplicating this task?
Thoughts anybody? - Damian
next prev parent reply other threads:[~2020-02-05 1:33 UTC|newest]
Thread overview: 67+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-03 14:16 [musl] PPC64(LE) support in musl requires ALTIVEC Romain Naour
2020-02-03 14:50 ` Rich Felker
2020-02-03 15:42 ` Romain Naour
2020-02-03 16:02 ` Jeffrey Walton
2020-02-03 16:18 ` David Edelsohn
2020-02-03 16:51 ` A. Wilcox
2020-02-05 1:32 ` Damian McGuckin [this message]
-- strict thread matches above, loose matches on Subject: below --
2020-01-16 4:30 [musl] Considering x86-64 fenv.s to C Damian McGuckin
2020-01-16 15:11 ` Markus Wichmann
2020-01-16 16:14 ` Rich Felker
2020-01-16 18:56 ` Damian McGuckin
2020-01-16 19:33 ` Rich Felker
2020-01-16 21:31 ` Damian McGuckin
2020-01-17 3:36 ` Damian McGuckin
2020-01-17 3:48 ` Damian McGuckin
2020-01-17 3:53 ` David Edelsohn
2020-01-17 14:13 ` Rich Felker
2020-01-17 14:19 ` David Edelsohn
2020-01-17 14:53 ` Rich Felker
2020-01-18 4:45 ` Damian McGuckin
2020-01-18 5:29 ` Rich Felker
2020-01-19 8:50 ` Damian McGuckin
2020-01-19 9:07 ` Damian McGuckin
2020-01-19 10:42 ` Szabolcs Nagy
2020-01-19 12:25 ` Damian McGuckin
2020-01-20 5:32 ` Damian McGuckin
2020-01-20 17:38 ` Rich Felker
2020-01-21 3:53 ` Damian McGuckin
2020-01-21 4:22 ` Rich Felker
2020-01-21 4:46 ` Damian McGuckin
2020-01-21 7:26 ` Damian McGuckin
2020-01-17 16:41 ` Markus Wichmann
2020-01-18 1:15 ` Szabolcs Nagy
2020-01-18 5:03 ` Damian McGuckin
2020-01-18 5:37 ` Rich Felker
2020-01-18 9:40 ` Szabolcs Nagy
2020-01-24 0:42 ` Damian McGuckin
2020-01-24 1:11 ` Rich Felker
2020-01-24 4:13 ` Damian McGuckin
2020-01-24 4:55 ` Rich Felker
2020-01-24 6:08 ` Damian McGuckin
2020-01-24 13:44 ` Rich Felker
2020-01-24 14:45 ` Damian McGuckin
2020-01-24 23:59 ` Damian McGuckin
2020-01-25 0:11 ` Rich Felker
2020-01-26 3:28 ` Damian McGuckin
2020-01-26 3:28 ` Damian McGuckin
2020-01-26 3:30 ` Damian McGuckin
2020-01-26 3:32 ` Damian McGuckin
2020-01-26 5:25 ` Damian McGuckin
2020-01-27 3:32 ` Damian McGuckin
2020-01-27 5:39 ` Damian McGuckin
2020-02-02 0:47 ` Damian McGuckin
2020-02-03 0:54 ` Damian McGuckin
2020-02-03 2:09 ` Rich Felker
2020-02-03 2:12 ` Damian McGuckin
2020-02-22 20:17 ` Rich Felker
2020-02-22 20:53 ` Damian McGuckin
2020-02-23 5:41 ` Damian McGuckin
2020-02-23 6:25 ` Rich Felker
2020-02-23 8:35 ` Damian McGuckin
2020-02-07 21:25 ` Damian McGuckin
2020-02-07 21:38 ` Rich Felker
2020-02-07 23:53 ` Damian McGuckin
2020-02-09 5:04 ` Damian McGuckin
2020-01-24 7:10 ` Damian McGuckin
2020-01-18 5:04 ` Markus Wichmann
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=alpine.LRH.2.02.2002051144080.24229@key0.esi.com.au \
--to=damianm@esi.com.au \
--cc=musl@lists.openwall.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
Code repositories for project(s) associated with this public inbox
https://git.vuxu.org/mirror/musl/
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).