From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-3.0 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_MED,RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=ham autolearn_force=no version=3.4.2 Received: from mother.openwall.net (mother.openwall.net [195.42.179.200]) by inbox.vuxu.org (OpenSMTPD) with SMTP id 05920c33 for ; Sun, 23 Feb 2020 07:08:42 +0000 (UTC) Received: (qmail 14250 invoked by uid 550); 23 Feb 2020 07:08:40 -0000 Mailing-List: contact musl-help@lists.openwall.com; run by ezmlm Precedence: bulk List-Post: List-Help: List-Unsubscribe: List-Subscribe: List-ID: Reply-To: musl@lists.openwall.com Received: (qmail 14214 invoked from network); 23 Feb 2020 07:08:39 -0000 X-Authentication-Warning: key0.esi.com.au: damianm owned process doing -bs Date: Sun, 23 Feb 2020 18:08:25 +1100 (AEDT) From: Damian McGuckin To: musl@lists.openwall.com Message-ID: User-Agent: Alpine 2.02 (LRH 1266 2009-07-14) MIME-Version: 1.0 Content-Type: TEXT/PLAIN; format=flowed; charset=US-ASCII Subject: [musl] Min and Max of 2 Floating Point numbers Curiosity only (i.e. not a MUSL question). But it is somewhat relevant to MUSL which I note at the end of this email. Besides the latest Intels, PowerPC, ARMs, I am just curious which of the CPU architectures implement this function directly at the assembler level, i.e. and hence avoiding a branch, i.e. double f .... double g .... and double fgmax = f > g ? f : g; The word 'implement' is a bit loose. I am not talking about the definition in Annex F of the C standard. The IEEE 754-2019 standard has changed the definition so as to properly propogate NaNs. The 1.2.0 version I just downloaded still follows the 2008 definition. ARM is smart enough to have 2 instructions, one (FMAX) which did propogate NaNs and one (FMAXNM) which follows the 2008 standard. That said, I do not personally compile on an ARM so I have no idea how you ask for FMAX or how you ask for FMAXNM? The PowerPC ISA 3.0 instruction properly propogates NaNs so it agrees with the new standard. The Intel instruction follows neither standard as far as I can tell. An interesting condition. Please tell me if I am wrong. MUSL relevance: I believe that even in 1.2.0, MUSL's own fmax/fmin libc routines violate the IEEE 754-2019 standard which came out recently. Well, it was approved June, published July, released November. I think that is recent. Regards - Damian Pacific Engineering Systems International, 277-279 Broadway, Glebe NSW 2037 Ph:+61-2-8571-0847 .. Fx:+61-2-9692-9623 | unsolicited email not wanted here Views & opinions here are mine and not those of any past or present employer