From mboxrd@z Thu Jan  1 00:00:00 1970
From: random832@fastmail.com (Random832)
Date: Wed, 03 Jan 2018 09:22:23 -0500
Subject: [TUHS] OT: critical Intel design flaw
In-Reply-To: <0b2201d3848a$02ba8d90$082fa8b0$@ronnatalie.com>
References: <CALMnNGh7FJ7LYgna1LKJUSW9+bE5O7cSEK8PViqqogwe08V8ow@mail.gmail.com>
 <0b2201d3848a$02ba8d90$082fa8b0$@ronnatalie.com>
Message-ID: <1514989343.884423.1222903600.4579DCEA@webmail.messagingengine.com>

On Wed, Jan 3, 2018, at 06:57, Ron Natalie wrote:
> I think it’s much ado about nothing.   In fact, nearly the same bug 
> cropped up in the 386 and we had to hack around it in UNIX then (in the 
> 32 bit pentiums you can use one of the segment registers to provide a 
> second layer of security over paging.   Alas, this doesn’t work on the 
> 64 bit addressing mode).

To my understanding, what's leaking is the addresses (and possibly physical addresses), which are in turn usable in a "rowhammer"-style attack - something that didn't exist (or wasn't known, anyway) in the 386 era.