From: cdl@mpl.ucsd.edu (Carl Lowenstein)
Subject: [pups] What is a 21-21858 chip?
Date: Mon, 19 Feb 2001 12:31:04 -0800 (PST) [thread overview]
Message-ID: <200102192031.MAA19280@chiton.ucsd.edu> (raw)
> From owner-pups at minnie.cs.adfa.edu.au Sat Feb 17 18:54 PST 2001
> X-Authentication-Warning: triangle.cs.uofs.edu: bill owned process doing -bs
> Date: Sat, 17 Feb 2001 21:43:51 -0500 (EST)
> From: Bill Gunshannon <bill at cs.scranton.edu>
> To: pups at minnie.cs.adfa.edu.au
> Subject: Re: [pups] What is a 21-21858 chip?
> MIME-Version: 1.0
>
>
> Maybe I'm just misunderstanding what is being discussed here, but
> I think the difference is that without the FP11 all you have are
> 4 simple Floating Point Instructions. FADD, FSUB, FMUL and FDIV.
> The FP11 adds a number of additional Instructions. I have never
> had a machine with the FP11 (Hmmmm, wonder if my new 11/93 has it?)
> so I don't know them off the top of my head, but my Macro-11 book
> is near at hand if anybody wants me to look it up.
You're missing something. The FADD FSUB FMUL FDIV was first used in
the 11/40 FIS (optional) floating-point instruction set. It was later
implemented as an optional chip add-on for the LSI-11 and LSI-11/2.
Single-precision only, and stack oriented.
The 11/45 Floating-point Processor had about 30 instructions and had both
single-precision and double-precision modes, and a bunch of registers.
Typical instruction mnemonics include ADDF SUBF MULF DIVF MODF and
the same with last character changed to D for Double.
The LSI-11/23 optional FP chip followed the 11/45 FPP style. The 11/73
CPU chip implemented the 11/45 FPP in microcode, and the 11/73 FPP
add-on implemented the 11/45 FPP in much faster microcode.
carl
next reply other threads:[~2001-02-19 20:31 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-02-19 20:31 Carl Lowenstein [this message]
[not found] <3sLM7KAxOrj6Ew8r@ruffnready.co.uk>
2001-02-18 2:43 ` Bill Gunshannon
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