From mboxrd@z Thu Jan  1 00:00:00 1970
From: helbig@Informatik.BA-Stuttgart.DE (Wolfgang Helbig)
Date: Sat, 14 Dec 2002 09:47:40 +0100 (MET)
Subject: [TUHS] re: Raise of interrupt level necessary
Message-ID: <200212141049.gBEAnqb01254@bsd.korb>

Dennis, I greatly appreciate your reply. What amazes me most, is the fact
that after 20 odd years you still remember those tricky details:

>For example, the clock interrupt routine can inspect user
>space (for display(), for example, though this is inactive
>on the 11/40), and even change it (for profiling).
>It does appear that other things (checking for
>a direct-from user-mode interrupt) in the clock routine
>already guard against these particular problems.

To see what happens, I just removed those IPL raising instructions from gword,
pword,_savu, _aretu, _copyseg, and _clearseg in m40.s. In fact, it didn't crash
the system. At least on my configuration, ISRs don't touch user space while
interrupting a kernel process. This rule is broken by the clock ISR, which calls
display() unconditionally. Just curious: Is there any other reason beside
seeing blinking lights that justifies calling display() 60 times per second
and breaking the rule?

I also removed IPL protection from the return sequence of the trap routine,
still works. Testing was done on Bob Supnik's SIMH PDP-11 simulator with only
one terminal. By the way, is anyone running V6 on a real PDP-11? Here
is the diff of my modifications to m40.s:

# diff m40.s.6 m40.s
44d43
*       bis     $340,PS
455,456d453
*       mov     PS,-(sp)
*       bis     $340,PS
472,473d468
*       mov     PS,-(sp)
*       bis     $340,PS
480d474
*       mov     (sp)+,PS
485d478
*       mov     (sp)+,PS
539d531
*       bis     $340,PS
548d539
*       bis     $340,PS
594c585
*       mov     $30340,PS
---
.       bis     $30000,PS
621c612
*       mov     $30340,PS
---
.       bis     $30000,PS

Greetings,

Wolfgang Helbig