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* [TUHS] v6 RK05 bootloader question
@ 2015-12-31 13:45 Noel Chiappa
  0 siblings, 0 replies; 13+ messages in thread
From: Noel Chiappa @ 2015-12-31 13:45 UTC (permalink / raw)


    > From: Wolfgang Helbig

    > The HALT instruction of the real PDP11 only stops the CPU 

I have this bit set that on at least some models of the real machine, when
the CPU is halted, it does not do DMA grants? If so, on such machines, the
trick of depositing in the device registers directly would not work; the
device could not do the bus cycles to do the transfer to memory. Anyone know
for sure which models do service DMA requests while halted?

	Noel



^ permalink raw reply	[flat|nested] 13+ messages in thread
* [TUHS] v6 RK05 bootloader question
@ 2015-12-27 20:32 Norman Wilson
  2015-12-29 20:55 ` Will Senn
  0 siblings, 1 reply; 13+ messages in thread
From: Norman Wilson @ 2015-12-27 20:32 UTC (permalink / raw)


Something of a tangent:

In my early days with UNIX, one of the systems I helped look
after was an 11/45.  Normally we booted it from an SMD disk
with a third-party RP-compatible contorller, for which we
had a boot ROM.  Occasionally, however, we wanted to boot it
from RK05, usually to run diagnostics, occasionally for some
emergency reason (like the root file system being utterly
scrambled, or the time we ran that system, with UNIX, on a
single RK05 pack, for several days so our secretaries could
keep doing their troff work while the people who had broken
our air-conditioning system got it fixed--all other systems
in our small machine room had to stay shut down).

There was no boot ROM for the RK05, but it didn't matter:
one just did the following from the front-panel switches:

1.  Halt/Enable to Halt
2.  System reset (also sends a reset to the UNIBUS)
3.  Load address 777404
4.  Deposit 5.
(watch lights blink for a second or so)
5.  Load address 0
6.  Halt/Enable to Enable
7.  Continue

777404 is the RK11's command register.  5 is a read command.
Resetting the system reset the RK11, which cleared all the
registers; in particular the word count, bus address, and
disk address registers.  So when the 5 was deposited (including
the bit 01, the GO bit), the RK11 would read from address 0 on
the disk to address 0 in physical memory, then increment the
word-count register, and keep doing so until the word count
was zero after the increment.  Or, in higher-level terms, read
the first 65536 words of the disk into the first 65536 words
of memory.

Then starting at address 0 would start executing whatever code
was at the beginning of memory (read from the beginning of the
disk).

Only the first 256 words (512 bytes) of the disk was really
needed, of course, but it was harmless, faster, and easier to
remember if one just left the word-count at its initial zero,
so that is what we did.

The boot ROM for the SMD disk had a certain charm as well.
It was a quad-high UNIBUS card with a 16x16 array of diodes,
representing 16 words of memory.  I forget whether one inserted
or removed a diode to make a bit one rather than zero.

It's too bad people don't get to do this sort of low-level stuff
these days; it gives one rather a good feel for what a bootstrap
does when one issues the command(s) oneself, or physically
programs the boot ROM.

Norman Wilson
Toronto ON



^ permalink raw reply	[flat|nested] 13+ messages in thread
* [TUHS] v6 RK05 bootloader question
@ 2015-12-26 18:34 Will Senn
  2015-12-26 19:15 ` Ronald Natalie
  2015-12-26 19:26 ` Ronald Natalie
  0 siblings, 2 replies; 13+ messages in thread
From: Will Senn @ 2015-12-26 18:34 UTC (permalink / raw)


All,

I'm trying to understand the RK bootloader code that is found in 
"Setting up Unix - Sixth Edition". My question is related to RKBA, RK's 
bus address buffer. Is the bus address the same as memory address? If 
so, the code makes sense, if not, I appreciate y'alls help.

Here's what I have so far:

RK05

01 012700       MOV 177414,R0  ; Move RKDB into R0
02 177414                      ; RKDB Address
03 005040       CLR -(R0)      ; Decrement R0 and clear the contents of RKDA
04 005040       CLR -(R0)      ; Decrement R0 and clear the contents of RKBA
05 010040       MOV R0,-(R0)   ; Move the contents of R0(RKBA) into 
decremented R0(RKWC)
06 012740       MOV 5,-(R0)    ; Decrement R0 and move 5 into RKCS
07 000005                      ; Read and go
08 105710 WAIT: TSTB (R0)      ; Test the lower byte of RKCS
09 002376       BGE WAIT       ; When bit 7 becomes 1, the read is done
10 005007       CLR PC         ; Set PC 000000, the start of the bytes read

RKDB - RK data buffer register
This register is a general data register and it only used by the code 
above to initialize R0 so that subsequent RK addresses can be found by 
simply decrementing R0.

RKDA - RK disk address register
This register determines the starting disk address of the read operation 
and is cleared by the code.

RKBA - RK current bus address register
This register contains the bus address to or from which data will be 
transferred. Is this the same as memory address?

RKWC - RK word count register
Two's complement of the number of words to be transferred.

RKCS - RK control status register
This is the register that controls the device and provides the device 
status to the program

Lines 1-2
The execution of the boot loader code moves the address of RKDB into R0 
to initialize the register so that it can be used to obtain the other RK 
buffer addresses as they are needed.

Line 3
The RKDA buffer is cleared, setting the disk address to 0.

Line 4
The RKBA buffer is cleared, setting the bus address to 0.

Line 5
The value in R0 is transferred into the RKWC buffer. RKBA or 177410, the 
value in R0, is a convenient number to use for the read operation 
because it is big enough to cause the program to read in a block of 
data. The number is in two's complement and represents -370. This tells 
the disk controller that 370 words (540 bytes) will be transferred.

Lines 6-7
The value 5 is placed into RKCS, this value represents a read operation 
and go.

Lines 8-9
The lower byte of RKCS is tested and when it is greater than or equal to 
zero (not negative), it loops, waiting until the value is negative, that 
is until bit 7 becomes 1, which indicates Control Ready (RDY) and done.

Line 10
  PC is set to 00000 and execution of the bytes read from the disk 
begins at location 00000.





^ permalink raw reply	[flat|nested] 13+ messages in thread

end of thread, other threads:[~2015-12-31 13:45 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2015-12-31 13:45 [TUHS] v6 RK05 bootloader question Noel Chiappa
  -- strict thread matches above, loose matches on Subject: below --
2015-12-27 20:32 Norman Wilson
2015-12-29 20:55 ` Will Senn
2015-12-29 21:37   ` Ronald Natalie
2015-12-30  7:14   ` Wolfgang Helbig
2015-12-30  7:29     ` Will Senn
2015-12-30 18:06       ` Erik E. Fair
2015-12-30 18:33         ` John Cowan
2015-12-31  8:06       ` Wolfgang Helbig
2015-12-26 18:34 Will Senn
2015-12-26 19:15 ` Ronald Natalie
2015-12-26 19:26 ` Ronald Natalie
2015-12-26 20:34   ` Will Senn

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