From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: tuhs-bounces@minnie.tuhs.org X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from minnie.tuhs.org (minnie.tuhs.org [45.79.103.53]) by inbox.vuxu.org (OpenSMTPD) with ESMTP id f08e5401 for ; Wed, 24 Oct 2018 11:24:19 +0000 (UTC) Received: by minnie.tuhs.org (Postfix, from userid 112) id 96BD9A203F; Wed, 24 Oct 2018 21:24:18 +1000 (AEST) Received: from minnie.tuhs.org (localhost [127.0.0.1]) by minnie.tuhs.org (Postfix) with ESMTP id 16A6EA1F9C; Wed, 24 Oct 2018 21:23:53 +1000 (AEST) Received: by minnie.tuhs.org (Postfix, from userid 112) id 3E3A9A1F9C; Wed, 24 Oct 2018 21:23:51 +1000 (AEST) Received: from mercury.lcs.mit.edu (mercury.lcs.mit.edu [18.26.0.122]) by minnie.tuhs.org (Postfix) with ESMTPS id D56979E565 for ; Wed, 24 Oct 2018 21:23:50 +1000 (AEST) Received: by mercury.lcs.mit.edu (Postfix, from userid 11178) id E94EB18C0AB; Wed, 24 Oct 2018 07:23:49 -0400 (EDT) To: tuhs@minnie.tuhs.org Message-Id: <20181024112349.E94EB18C0AB@mercury.lcs.mit.edu> Date: Wed, 24 Oct 2018 07:23:49 -0400 (EDT) From: jnc@mercury.lcs.mit.edu (Noel Chiappa) Subject: Re: [TUHS] System III on 11/34 + rl02 X-BeenThere: tuhs@minnie.tuhs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: The Unix Heritage Society mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jnc@mercury.lcs.mit.edu Errors-To: tuhs-bounces@minnie.tuhs.org Sender: "TUHS" > From: Jacob Ritorto > System III only supports rl01, not rl02 Really? That seems odd; SysII long post-dates (I think) the RL0x, if so it's odd they only supported the RL01. Looking at: https://minnie.tuhs.org//cgi-bin/utree.pl?file=SysIII/usr/src/uts/pdp11/io/rl.c it seems to support RL02's: #define RL02 0200 /* bit 7 indicates an rl02 present if set */ > Would anyone know if it's trivial to modify the source for the rl01 > driver to just add double the blocks The only difference between the two is that the RL02 has twice as many cylinders, so there's an extra bit in use on the high end of the 'disk address' register. > From: Clem cole > Also if you have a 40 class system like the 34 of 34A see if you can > find an Able Enable board. I'm sure there are a stack of them stored away with Jimmy Hoffa's body and the Ark of the Covenant in King Solomon's Mine! :-) Seriously, if anyone has one, I'd pay a very substantial sum for it. Noel