From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 1226 invoked from network); 13 Dec 2022 14:48:23 -0000 Received: from minnie.tuhs.org (50.116.15.146) by inbox.vuxu.org with ESMTPUTF8; 13 Dec 2022 14:48:23 -0000 Received: from minnie.tuhs.org (localhost [IPv6:::1]) by minnie.tuhs.org (Postfix) with ESMTP id 0C951423D8; Wed, 14 Dec 2022 00:48:18 +1000 (AEST) Received: from relay05.pair.com (relay05.pair.com [216.92.24.67]) by minnie.tuhs.org (Postfix) with ESMTPS id 4408C423D6 for ; Wed, 14 Dec 2022 00:48:13 +1000 (AEST) Received: from orac.inputplus.co.uk (unknown [87.112.76.75]) by relay05.pair.com (Postfix) with ESMTP id 3D96F1A17E6 for ; Tue, 13 Dec 2022 09:48:12 -0500 (EST) Received: from orac.inputplus.co.uk (orac.inputplus.co.uk [IPv6:::1]) by orac.inputplus.co.uk (Postfix) with ESMTP id 3D98520152 for ; Tue, 13 Dec 2022 14:48:11 +0000 (GMT) From: Ralph Corderoy To: tuhs@tuhs.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit In-reply-to: <202212131431.2BDEVCls018959@freefriends.org> References: <202212131431.2BDEVCls018959@freefriends.org> Date: Tue, 13 Dec 2022 14:48:11 +0000 Message-Id: <20221213144811.3D98520152@orac.inputplus.co.uk> Message-ID-Hash: Z7HTDJQ4CHTJSMBA7DLYMTUJXV3FJ7VU X-Message-ID-Hash: Z7HTDJQ4CHTJSMBA7DLYMTUJXV3FJ7VU X-MailFrom: ralph@inputplus.co.uk X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-tuhs.tuhs.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] Re: Clever code List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Hi Arnold, > > The PB 250 had two instruction-sequencing modes. In one mode, each > > instruction included the address of its successor. In the other > > mode, whatever popped out the delay line when the current > > instruction completed would be executed next. ... > The second mode you describe sounds like it would be impossible to use > if you wanted repeatable, reproducible runs of your program. How so? As long as the time taken by the current instruction was constant then it would be known what's popping out of the delay line when it's done. And if the time varied, say because of an operand or the need to carry, then that could be used to choose between addresses. Either way, it's repeatable. It is as if the PC register on today's CPU was steadily trundling through program memory in parallel to the execution of the current instruction and when the fetch cycle started, it got whatever PC was pointing at. BTW, there's https://en.wikipedia.org/wiki/Delay-line_memory if you don't know much about them, though I don't think it covers how the line's content was modified other than a simple block diagram showing taps for input and output. https://en.wikipedia.org/wiki/Delay-line_memory#/media/File:SEACComputer_010.png -- Cheers, Ralph.