From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=MAILING_LIST_MULTI, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 3866 invoked from network); 3 Aug 2023 21:48:32 -0000 Received: from minnie.tuhs.org (50.116.15.146) by inbox.vuxu.org with ESMTPUTF8; 3 Aug 2023 21:48:32 -0000 Received: from minnie.tuhs.org (localhost [IPv6:::1]) by minnie.tuhs.org (Postfix) with ESMTP id 50262416AC; Fri, 4 Aug 2023 07:48:29 +1000 (AEST) Received: from mercury.lcs.mit.edu (mercury.lcs.mit.edu [18.26.0.122]) by minnie.tuhs.org (Postfix) with ESMTPS id D19D2416A9 for ; Fri, 4 Aug 2023 07:48:22 +1000 (AEST) Received: by mercury.lcs.mit.edu (Postfix, from userid 11178) id CEE3F18C07E; Thu, 3 Aug 2023 17:48:21 -0400 (EDT) To: tuhs@tuhs.org Message-Id: <20230803214821.CEE3F18C07E@mercury.lcs.mit.edu> Date: Thu, 3 Aug 2023 17:48:21 -0400 (EDT) From: jnc@mercury.lcs.mit.edu (Noel Chiappa) Message-ID-Hash: 5VXUWI7LQAHMOTM7LT2V7AMVP74V63KB X-Message-ID-Hash: 5VXUWI7LQAHMOTM7LT2V7AMVP74V63KB X-MailFrom: jnc@mercury.lcs.mit.edu X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: jnc@mercury.lcs.mit.edu X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] Re: Split addressing (I/D) space (inspired by the death of the python... thread) List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: > From: Will Senn > Does unix (v7) know about the PDP-11 45's split I/D space through > configuration or is it convention and programmer's responsibility to > know and manage what's actually available? There are two different cases: i) support of split I+D in the kernel, and ii) support of split I+D in user processes. Both arrived with V6; the V5 source: https://minnie.tuhs.org/cgi-bin/utree.pl?file=V5/usr/sys/conf/mch.s https://minnie.tuhs.org/cgi-bin/utree.pl?file=V5/usr/sys/ken/main.c (former for kernel; later for users) shows no sign of it. > From: Kenneth Goodwin > 1. I don't think the 11/45 had split I & d. > But I could be wrong. > That did not appear until the 11/70 You are wrong. The chief differences between the KB11-A&-D of the -11/45 and the -B&-C of the -11/70 were i) the latter had a cache, and ii) the latter used the 32-bit wide Main Memory Bus, which also allowed up to 4 Mbytes of main memory. Detail here: https://gunkies.org/wiki/PDP-11/70 along with a couple of lesser differences. > From: "Ronald Natalie" > with only 8 segment registers combined for code, data, and stack I think you meant for code, data, and user block. > The 55 (just a tweaked 45) The /50 and /55 had the identical KB11-A&-D of the /45; the difference was that they came pre-configured with Fastbus memory. > In addition the 23/24/J-11 and those derived processors did. No; the F-11 processors did not support I&D, the J-11 did. Noel