This is what we did at Fortune Systems for our 68k based v7 system.
There was an external “mmu” which added a base value to a 16 bit virtual
address to compute a physical address. And compared against a limit.
There were four base,limit pairs that you had to rewrite to context switch:
Text, data, spare and stack. At a minimum the system shipped with 256KB
so you could have a number of processes memory resident. You swapped
out a complete segment when you ran out of space. 

I imagine other 16bit word size machines of that era used similar schemes.

> On Apr 25, 2018, at 1:29 PM, Paul Winalski <paul.winalski at gmail.com> wrote:
> 
> Some PDP-11 models had a virtual addressing feature called PLAS
> (Program Logical Address Space).  The PDP-11 had 16-bit addressing,
> allowing for at most 64K per process.  To take advantage of physical
> memory larger than 64K, PLAS allowed multiple 64K virtual address
> spaces to be mapped to the larger physical memory.  Sort of the
> reverse of the usual virtual addressing scheme, where there is more
> virtual memory than physical memory.