From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_INVALID,DKIM_SIGNED, MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 9352 invoked from network); 20 Apr 2023 15:57:33 -0000 Received: from minnie.tuhs.org (50.116.15.146) by inbox.vuxu.org with ESMTPUTF8; 20 Apr 2023 15:57:33 -0000 Received: from minnie.tuhs.org (localhost [IPv6:::1]) by minnie.tuhs.org (Postfix) with ESMTP id 37F7D4128C; Fri, 21 Apr 2023 01:57:29 +1000 (AEST) Received: from ewsoutbound.kpnmail.nl (ewsoutbound.kpnmail.nl [195.121.94.168]) by minnie.tuhs.org (Postfix) with ESMTPS id 05AEF4128A for ; Fri, 21 Apr 2023 01:57:16 +1000 (AEST) X-KPN-MessageId: 004f3e7c-df94-11ed-81b2-005056aba152 Received: from smtp.kpnmail.nl (unknown [10.31.155.37]) by ewsoutbound.so.kpn.org (Halon) with ESMTPS id 004f3e7c-df94-11ed-81b2-005056aba152; Thu, 20 Apr 2023 17:57:07 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=planet.nl; s=planet01; h=to:date:message-id:subject:mime-version:content-type:from; bh=9hT2uRku4W5c0DA4Jk+EpFVFB33ahnbAtJinR/D/OSU=; b=IgX4Se8uqQ7acndZJhskUqB28WczUKNKh0s8yyFUq42px/kTkO1myFO38sx14awjmVrr9A5QQpw0l 0x9OC5LvnrX3Z7j+X6UsR3OkjwpbfdYj0GfHj376c0gAf3N7ttg4Pi4cXlKAMLsR902rRQ2vHpEFZA rJoWOM0wcvEyiccg= X-KPN-MID: 33|P0J7jrP8jh4BYpAn0u+sqcZvU1oTqBZhm1QRlOl48uPLDQxAygyf4ODdVeRysSC 0F0Ov4dzPDqgo2m8N0vKEG9asGlr4AVlp/bJQKTUTsV4= X-KPN-VerifiedSender: Yes X-CMASSUN: 33|QjH2HJiMYcLsKIW2nPdchSt6VxE3WA0YogPLm3apDS6UkB74RaWYGOy/vlvDYSp efheKOlHup5FV0MQHaiFF4A== X-Originating-IP: 77.172.38.96 Received: from smtpclient.apple (77-172-38-96.fixed.kpn.net [77.172.38.96]) by smtp.kpnmail.nl (Halon) with ESMTPSA id 03338456-df94-11ed-9b85-005056ab1411; Thu, 20 Apr 2023 17:57:12 +0200 (CEST) From: Paul Ruizendaal Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Mime-Version: 1.0 (Mac OS X Mail 14.0 \(3654.120.0.1.13\)) Message-Id: <2CB8870A-5FE5-4D02-ABF4-C8E520F8A2D1@planet.nl> Date: Thu, 20 Apr 2023 17:57:11 +0200 To: "tuhs@tuhs.org" X-Mailer: Apple Mail (2.3654.120.0.1.13) Message-ID-Hash: 23BFFLMGFYEQUSEB3O543I5FRV7UB7VF X-Message-ID-Hash: 23BFFLMGFYEQUSEB3O543I5FRV7UB7VF X-MailFrom: pnr@planet.nl X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] Re: UNIX "Machine Layer" Standards List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: Hi Matt, I=E2=80=99ve responded on list about the early unix development process = as I understand it, but I want to avoid discussing things that are not = directly related to the history of Unix. Hence this PM as well. =20 > Where I'm trying to put this sort of knowledge into use is I'm = starting to spec out a kernel bootstrap for the RPi Pico and Pine64 Ox64 = boards (ARM32 and RISCV64 respectively) that is not only sufficient to = start a V7-ish kernel on each, but that are ultimately based on the same = design, varying literally only where the hardware strictly necessitates = it, but similar enough that reading the two assembly files side by side = yields essentially the exact same discrete operations. I have a similar interest, working with early Unix and modern RiscV = hardware for a compare and contrast experience. - My development targets are (i) an FPGA based RV32 SoC implementation, = (ii) a Sipeed D1 RV64GC board and shortly (iii) a Pine64 Pinetab-V. - My software targets are: (a) xv6-rv, (b) SysIII, (c) Linux, (d) = experiments around SysIII Linux is for me a secondary target, just for comparison and to see if = ideas are =E2=80=9CLinux capable=E2=80=9D. I=E2=80=99m not overly = interested in Arm at the moment. My ideas are still evolving, but currently more or less along the below = lines: - Boot rom loads SPL, this is custom in each case and set by the SoC's = designers. - SPL initialises DRAM system and loads next stage. Unfortunately, this = too would seem to be quite system specific, but the BSP should provide = the baseline for this. As BSP=E2=80=99s are often a mess, milage may = vary. - The next stage is a hybrid of BBL, OpenSBI and Virtio. The idea is to = provide a standard abstraction layer that all of my software targets can = work with. This idea is used for the FPGA target and allows booting a = Linux kernel with just the generic Virtio device drivers (so far just = disk and console). - The last layer is the classical OS layer. If I get it right, each OS = can run on all h/w targets without customisation. At the moment I=E2=80=99m playing with USB, and how that might layer = into the structure of V7, SysIII or 8th Edition -- and also the above.