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* [TUHS] PDP-11/70 SPL
@ 2016-03-28 14:18 Noel Chiappa
  2016-03-28 14:44 ` Johnny Billquist
  0 siblings, 1 reply; 8+ messages in thread
From: Noel Chiappa @ 2016-03-28 14:18 UTC (permalink / raw)


    > From: Dave Horsfall <dave at horsfall.org>

    > SPL 7 was only used by the clock interrupt

Err, according to the 1975 Peripherals Handbook, both are BR6. (Sorry, only
interested in accuracy.)

    > even the published Unibus spec was known to be wrong, in order to keep
    > 3rd-party kit out of it (it was something subtle to do with buss timing,
    > so sometimes the card worked, and sometimes it didn't, doing wonders for
    > your reputation).

I don't know about that, but we built two UNIBUS DMA networking devices,
relying on the UNIBUS description in the 1975 Peripherals Handbook, and they
both worked fine (one became a product for Proteon).

    > Slightly longer?  I think it was Lions himself who used to teach us that
    > a lost interrupt is nasty :-(

The interrupt isn't lost, it's just that the OS does a WAIT when it should
perhaps return and start up some user process - but that resumption of doing
user computations is delayed by at most 1 clock tick (some other device may
interrupt during the WAIT, before the clock does).

    > Anyone here remember overlapped seeks on the RK-11 failing under Unix

I'd be interested in the details of this. The V6 RK driver didn't use them,
but the RK11-D does claim to support them (having spent a modest amount of
time looking at the drawings), so I'd very much like to know what the bug was.

    > I know that Kevin Dawson (I think) tried it on my /40 as well

The 11/40 does not have the SPL instruction; see the '75-'76 PDP-11 Processor
Handbook, pg. 4-5. (Again, sorry, just want to be accurate.)

    > Christ, but this is starting to sound like some religion or other.

I am only interested in correct data.

	Noel


^ permalink raw reply	[flat|nested] 8+ messages in thread
* [TUHS] PDP-11/70 SPL
@ 2016-03-28 13:43 Noel Chiappa
  0 siblings, 0 replies; 8+ messages in thread
From: Noel Chiappa @ 2016-03-28 13:43 UTC (permalink / raw)


    > From: Johnny Billquist

    > this also means that you must be at SPL 7 before any of this

Yes, I assumed that (since it wouldn't make sense otherwise :-).

    > In general, I would say that this is not the way I would write code, but
    > ... 2.11BSD do an SPL 0 followed by WAIT.

Right; even if one does something like have every interrupt set a flag (which
is cleared while interrupts are disabled), and check that after lowering the
priority, but before doing the WAIT, there's _still_ a window between that
check, and the WAIT (although I guess it's less likely to be hit, since the
interrupt request would have to be posted _in that window_, not be hanging
around waiting to be serviced).

The only way (that I can work out) to atomically lower the priority and wait
is to do an RTI with the PC on the stack pointing to the WAIT instruction, but
I'm not sure even that is guaranteed to work.

I guess it all depends on the CPU implementation: does it check for pending
interrupts before each instruction, or only at the end of each instuction, or
what? If before, and there's an interrupt pending, it will go off before the
WAIT is executed. Although I suppose if it's at the end, it would do the check
at the end of the RTI, and do the interrupt then.

And whether it's at the end, or the beginning, WAIT itself must be special
cased, to check for pending interrupts during the execution (which can take an
indeterminate amount of time).

    > 2.11BSD will work potentially with a slight degration if the SPL do not
    > block interrupts.  It will still work fine, as you will, at a minimum,
    > get an interrupt at the next clock tick, which will wake it up. But it
    > might possibly be sitting in a WAIT slightly longer than required.

Yes, exactly.

    > RSX in fact just loops after the WAIT. If an interrupt should cause the
    > system to be able to do something more productive, it will not return to
    > the idle loop. So yes, it also detects in the interrupt exit processing,
    > that it was/is in the idle loop.

Does it detect if it was _before_ the WAIT instruction? I would assume it does,
but I don't know anything sbout RSX.

    > But at least processor and chip manuals do not say that SPL will block
    > interrupts.

Yes, I looked too, in a variety of places (PDP-11 Architecture, including in
the 'model differences' table, 11/73 Tech Manual, etc). Crickets...

    Noel


^ permalink raw reply	[flat|nested] 8+ messages in thread
[parent not found: <mailman.171.1459115387.15972.tuhs@minnie.tuhs.org>]

end of thread, other threads:[~2016-03-28 16:52 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2016-03-28 14:18 [TUHS] PDP-11/70 SPL Noel Chiappa
2016-03-28 14:44 ` Johnny Billquist
     [not found]   ` <0BAE4C73-C72B-453E-BEBD-EA34CEEA9853@uwlax.edu>
2016-03-28 16:37     ` Johnny Billquist
2016-03-28 16:52       ` Milo Velimirović
  -- strict thread matches above, loose matches on Subject: below --
2016-03-28 13:43 Noel Chiappa
     [not found] <mailman.171.1459115387.15972.tuhs@minnie.tuhs.org>
2016-03-27 23:07 ` Johnny Billquist
2016-03-28 13:37   ` Dave Horsfall
2016-03-28 15:18     ` John Cowan

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