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[173.48.42.254]) by smtp.gmail.com with ESMTPSA id j27sm3604766qki.9.2019.08.30.19.47.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Aug 2019 19:47:02 -0700 (PDT) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (1.0) From: Clem cole X-Mailer: iPhone Mail (16G77) In-Reply-To: <20190831011359.E9F491570CE9@mail.bitblocks.com> Date: Fri, 30 Aug 2019 22:46:57 -0400 Content-Transfer-Encoding: quoted-printable Message-Id: <88242A0D-D08E-47EB-84DC-A7205780A417@ccc.com> References: <1567196510.21824.for-standards-violators@oclsc.org> <20190830215202.GA974@mcvoy.com> <20190831011359.E9F491570CE9@mail.bitblocks.com> To: Bakul Shah Subject: Re: [TUHS] dmr streams & networking [was: Re: If not Linux, then what?] X-BeenThere: tuhs@minnie.tuhs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: The Unix Heritage Society mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: The Eunuchs Hysterical Society Errors-To: tuhs-bounces@minnie.tuhs.org Sender: "TUHS" There was most definitely a TLB or as Dave called it =E2=80=98The TB=E2=80=99= *** Remember Dave Cane (Masscomp hw lead) was part of the 780, led the 750 and d= esigned the BI before he left dec. He was a bus and memory specialist=20 *** west coast VS east coast training - calling it a TB vs a TLB. =20 Sent from my PDP-7 Running UNIX V0 expect things to be almost but not quite.= =20 > On Aug 30, 2019, at 9:13 PM, Bakul Shah wrote: >=20 >> On Fri, 30 Aug 2019 20:58:13 -0400 Clem Cole wrote: >>=20 >> Actually not in lock step. They were independent. One was called the >> executor and the other the fixer. When a fault was detected the executor= >> was sent wait stated while the fixer handled the fault and refilled the >> TLB. Once the TLB was set to instruction was allowed to complete. Bt= w >> when the 68010 was released the pals on the board were changed to allow t= he >> executor to actually take the fault and do something else while the fixer= >> replaced the TLB entry >=20 > As I remember, the issue with 68000 was that instructions were > not restartable so in case of accessing memory that didn't > exist, you couldn't take a segfault and do anything useful. > This is why you needed a second processor to deal with an > external MMU. There would have been no TLB unless you actually > added an external TLB -- but an external CAM would've been > very expensive. May be a direct map? >=20 > What we did at Fortune was to utilize a 4 entry external map: > text, data, extra and stack. When a new function was invoked > it would do a 'probe'. If the probe caused a segfault, stack > was extended in the handler. The probe didn't have to be > restartable. So we didn't need a second 68k. This logic may > have been in the V7 port we started from.