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[107.215.223.229]) by smtp.gmail.com with ESMTPSA id j4-20020a05620a288400b006feb158e5e7sm7896864qkp.70.2022.12.19.18.52.58 (version=TLS1_2 cipher=ECDHE-ECDSA-AES128-GCM-SHA256 bits=128/128); Mon, 19 Dec 2022 18:52:58 -0800 (PST) Content-Type: text/plain; charset=us-ascii Mime-Version: 1.0 (Mac OS X Mail 16.0 \(3731.300.101.1.3\)) From: Bakul Shah In-Reply-To: Date: Mon, 19 Dec 2022 18:52:47 -0800 Content-Transfer-Encoding: quoted-printable Message-Id: <94155806-907F-40EE-AB00-F3B345509442@iitbombay.org> References: <202212191738.2BJHcLBF024793@ultimate.com> To: Rob Pike X-Mailer: Apple Mail (2.3731.300.101.1.3) Message-ID-Hash: 734JEDK4AOZ7ETZLBHWO5ZXDM56PTHRQ X-Message-ID-Hash: 734JEDK4AOZ7ETZLBHWO5ZXDM56PTHRQ X-MailFrom: bakul@iitbombay.org X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-tuhs.tuhs.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: The Eunuchs Hysterical Society X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] Re: UNIX on (not quite bare) System/370 List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: On Dec 19, 2022, at 1:19 PM, Rob Pike wrote: >=20 > Reiser and London's Unix, which I greatly admired, died on the vine > for a variety of political reasons, as well as because it had > slightly different semantics in some important cases, and because > of a broad antipathy to virtual memory across the company due to > various people having used VM on inadequate hardware, and of course=20 > then there was Multics. Sandy Fraser was very nervous about > Research adopting the BSD kernel because of his experience with > Atlas. But let it be said: Reiser's VM system was seriously > impressive, cleanly integrated, structurally central, and > wonderfully fast. And Sandy relented but the general warmth of 1127 > towards Berkeley led to Research adopting Berkeley Unix as its VAX > VM platform, despite some, including myself, feeling that was=20 > inferior choice. Is there a publicly available description of Reiser's VM system? I found "A Unix operating system for the DEC VAX 11/780 Computer" by London & Reiser which includes a long paragraph on VM (included below) but that is about it. And it would be interesting to hear why and what you found in Reiser's VM system that was better than Berkeley's VM system. Thanks! =46rom the London&Reiser paper: The virtual address space of a process running on the VAX-11/780 consists of 2**32 8-bit bytes. The two high-order bits of a 32-bit address determine one of four segments. Two of these segments are system segments common to the address space of all processes. One of the system segments is reserved for future use. The other two segments are separately defined for each process and are automatically managed by the context switching instructions. One of the per-process segments is designed for a stack which grows towards lower-numbered memory addresses. Segments are divided into pages of 512 bytes. Memory mapping hardware translates virtual addresses into physical addresses using page tables. A page table contains one four-byte entry for each page mapped; the entry contains a valid bit, a four-bit field which encodes access privileges, a modify bit, and the physical page-frame number where the page is mapped. (There is no reference bit which is maintained by hardware!) A base register and a limit register describe the page table of each segment. The base register of a per-process segment contains a virtual address within the system segment; the base register for the system segment contains a physical memory address. The VAX11/780 central processor contains a virtual address translation buffer holding 128 virtual address-page frame number pairs which eliminates the need for extra memory references during address translation for (typically) 9896 of all memory references. The memory is implemented using MOS semiconductor RAMs with an error correcting code which corrects all single-bit errors and detects all double-bit errors and 70% of all greater-than-double bit errors. A memory controller can handle 8 memory boards; using 4K chips each board can hold 128K bytes. There can be two memory controllers, thus the maximum amount of physical memory is currently 2 megabytes. When 16K chips are used (forecasted for late 1978), each board will hold 512K, and physical memory can be 8 megabytes. There is a battery backup option for maintaining data in the event of a power failure. Each optional battery will maintain l megabyte for 10 minutes.=