From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: tuhs-bounces@minnie.tuhs.org X-Spam-Checker-Version: SpamAssassin 3.4.1 (2015-04-28) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-0.4 required=5.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_SIGNED,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE, T_DKIM_INVALID autolearn=ham autolearn_force=no version=3.4.1 Received: from minnie.tuhs.org (minnie.tuhs.org [45.79.103.53]) by inbox.vuxu.org (OpenSMTPD) with ESMTP id 4c331360 for ; Wed, 20 Jun 2018 16:33:43 +0000 (UTC) Received: by minnie.tuhs.org (Postfix, from userid 112) id C3673A17DA; Thu, 21 Jun 2018 02:33:42 +1000 (AEST) Received: from minnie.tuhs.org (localhost [127.0.0.1]) by minnie.tuhs.org (Postfix) with ESMTP id 8EB669EDF1; Thu, 21 Jun 2018 02:33:11 +1000 (AEST) Authentication-Results: minnie.tuhs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=KLWCmizD; dkim-atps=neutral Received: by minnie.tuhs.org (Postfix, from userid 112) id 58E3C9EDF1; Thu, 21 Jun 2018 02:33:09 +1000 (AEST) Received: from mail-lf0-f45.google.com (mail-lf0-f45.google.com [209.85.215.45]) by minnie.tuhs.org (Postfix) with ESMTPS id 540EE9EDE7 for ; Thu, 21 Jun 2018 02:33:08 +1000 (AEST) Received: by mail-lf0-f45.google.com with SMTP id a13-v6so221191lfk.12 for ; Wed, 20 Jun 2018 09:33:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=FDgl32qV8AZvM26kvqob7fQorzCKHGjAmo/+I4JBIF0=; b=KLWCmizDn0STv86Ei+BZj2+nFigIMtjly3RQQOLEGAD9lOxr80BNun9jCbMiLYiaTq xFoLDWGSlFdKERsQpD3AISLgw8I9GA3D2PGkzMQEnrMLUvGLnPE3pIZA6Iy9lxHVue0N ucKAGvkDiq/0iQmDqRUzxK7bl1uhi7zyfLiiK5UroWcFghJkqgBxtDgfVkHdjc+3SHiY g0CHBWbia0OTt36D6r5JSF0sumEhsRW8d9kkS9IelWAwTc4fp/eMn1E83EZbr2/FXS6N Sg6sIepvQ6RFjYG5GTYjx8ZE8Urd5iZHXMjHa/SvsQYxyFVnCbFTeyKe8Gd8P1KjwEsS vWEA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=FDgl32qV8AZvM26kvqob7fQorzCKHGjAmo/+I4JBIF0=; b=phT08hs7hbH9DdPTqpWHZfMLHV2y14thzcyxDgwxSa7jKxa37lxzrTh9QzsjjhuRHr lUBhlYzqJ752bWBoDK5TkJwfoFh7EJTijiQbveomqdyrolUVBLxEjs7zgCYwwfEZHVdH FtLVnBdLRE8leyKjQHYsyeTFZ4ywELdW9T711/8ZARcK+bScmcGkTF/4+qfQPhfTj+ZE Pdg9AzmnXhXPxvYfIspYIZnjAgb1CJPkI+K72AlkzqWr//0HvAVvxT5W3R0kE7zTUT1M vldvNX93YsH0S/x24GbPq7REMo6ansvma01NikQ7hDug7Fec7RaBpFmetl3uprxLZZsq VXYQ== X-Gm-Message-State: APt69E0ai2XZjzorVr7VErsDb2+1HN5Oh0n2utS4rkZK+3lQIANOMwjp MdB09ZE1qQffUMnsmBAvvhwJGrw0quOs3bcvpU8= X-Google-Smtp-Source: ADUXVKIOhE/emAMwH5rhbW0GgleR9cPB5B2h9MIrTZ6xP9t0cNZtdTZ1P6TxWdWcb0dLMPjU2+JCsbha/DHxc/cCZt4= X-Received: by 2002:a2e:3011:: with SMTP id w17-v6mr15750604ljw.20.1529512386450; Wed, 20 Jun 2018 09:33:06 -0700 (PDT) MIME-Version: 1.0 Received: by 2002:a2e:5901:0:0:0:0:0 with HTTP; Wed, 20 Jun 2018 09:33:05 -0700 (PDT) In-Reply-To: <20180620081032.GF28267@eureka.lemis.com> References: <20180615152542.E1EC918C08C@mercury.lcs.mit.edu> <20180619204536.GA91748@server.rulingia.com> <20180620050454.GC91748@server.rulingia.com> <20180620081032.GF28267@eureka.lemis.com> From: Paul Winalski Date: Wed, 20 Jun 2018 12:33:05 -0400 Message-ID: To: "Greg 'groggy' Lehey" Content-Type: text/plain; charset="UTF-8" Subject: Re: [TUHS] Old mainframe I/O speed (was: core) X-BeenThere: tuhs@minnie.tuhs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: The Unix Heritage Society mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: The Eunuchs Hysterical Society Errors-To: tuhs-bounces@minnie.tuhs.org Sender: "TUHS" On 6/20/18, Greg 'groggy' Lehey wrote: > > Looking at something like the IBM 370 series (mid-1970s), I/O was > performed by the channels, effectively separate processors with a very > limited instruction set. Others, like the UNIVAC 1100 series, could > perform I/O directly or via separate processors. This was similar on > the /360, but very different on the 1401. All of the System/360 series except the model 25 used separate channel processors to perform I/O. Once the I/O was initiated, the channel performed data transfer to and from main storage (IBM didn't use the term "memory") completely independently from the CPU. The S/360 model 25 was the last of the 360 series and was really a 16-bit minicomputer microprogrammed to execute the S/360 instruction set. It had what they called "integrated channels", meaning that I/O was handled by CPU microcode. IBM used the model 25 I/O design in the S/370 models 135 and 145. The models 115 and 125 were actually four 16-bit processors on a bus along with main memory. One of them, the service processor, handled system power-on, power-off, microcode load, diagnostics, and the system console (a modified 3277 transaction terminal). One was the CPU and executed the S/370 instruction set in microcode. The remaining two processors acted as a byte and block multiplexer channel. This meant that I/O proceeded independently from the CPU, as with the old 360s. It also meant that if the system was reading cards, punching cards, and printing all at the same time (often the case when spooling), a model 125 outperformed a 145 in compute speed, because the 145 had to execute a microcode loop for every byte of I/O. The 158 and 168 appear to have had independent channels, but housed in the same boxes as the CPU as opposed to stand-alone units as with S/360. -Paul W.