From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,HTML_MESSAGE, MAILING_LIST_MULTI,RCVD_IN_DNSWL_NONE autolearn=ham autolearn_force=no version=3.4.2 Received: from minnie.tuhs.org (minnie.tuhs.org [45.79.103.53]) by inbox.vuxu.org (OpenSMTPD) with ESMTP id e8c354c1 for ; Sat, 31 Aug 2019 19:04:31 +0000 (UTC) Received: by minnie.tuhs.org (Postfix, from userid 112) id 1CAF49C105; Sun, 1 Sep 2019 05:04:30 +1000 (AEST) Received: from minnie.tuhs.org (localhost [127.0.0.1]) by minnie.tuhs.org (Postfix) with ESMTP id EA1869C0B2; Sun, 1 Sep 2019 05:04:15 +1000 (AEST) Authentication-Results: minnie.tuhs.org; dkim=pass (1024-bit key; unprotected) header.d=ccc.com header.i=@ccc.com header.b="E3HVSzsd"; dkim-atps=neutral Received: by minnie.tuhs.org (Postfix, from userid 112) id 141339C0B2; Sun, 1 Sep 2019 05:04:15 +1000 (AEST) Received: from mail-wm1-f44.google.com (mail-wm1-f44.google.com [209.85.128.44]) by minnie.tuhs.org (Postfix) with ESMTPS id 484029C0A7 for ; Sun, 1 Sep 2019 05:04:14 +1000 (AEST) Received: by mail-wm1-f44.google.com with SMTP id v15so10637798wml.0 for ; Sat, 31 Aug 2019 12:04:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ccc.com; s=google; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=k/64WDKyBsM0eo7YE747Zg9/0uqWSlS7XKR582kSk2w=; b=E3HVSzsdVLQ84HHygeN7XKnkbj97grzS09QH4i5xowFdXtATd/Q5s1/fEFOWTUgRSU gyb2V4TZ5M3cr16v56QY9uX40lmrEqhjAzhP6bfrO5mF/+LKMILg4FG9eQaiKHTgG0/h +2sXYjxLBAINLbecOZuy3DyX/jvMdqlZrG9pg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:references:in-reply-to:from:date :message-id:subject:to:cc; bh=k/64WDKyBsM0eo7YE747Zg9/0uqWSlS7XKR582kSk2w=; b=ie+BeRPtXspop36MZ8NnxwvK7WMI6JLSBCwbFrpjfLautNJQt6PuoP75qwnDSZ9O1W Ua9PHzQN3Y7VgdDpQY0NH7Y4kQz0H7MJkt+ZqF6URgXUlhw9+Ephx5RnxJVZcJ05aeEn ITriAElOIxeXhO1PwyR8Ii+MnjE4bI+qX0mZLbLnK8HhXGhDXaDRBFnsT4+e405JXYLH Ta1cbqtWQVecDLtMacNxwrMfKcAxcUfT1/juCfAScyypPs4eCJt+VsaAq9a4/x2RV18d OmVguAXpwNHTDrA6Y2C2ChPWG+JxFJ3ncd3He3C4DcvcF+s4SyLqo1GDNmzJElh6asna jePQ== X-Gm-Message-State: APjAAAXpbKe1k/k3hc/GyM+zIA56t3hGfp3AnAWx/+ni7Gk0TXEXA65U hBYnUatjJ6BhUtZ3/G48/aOhRJUcNp2lYODD6JfwXw== X-Google-Smtp-Source: APXvYqxlQAHliOpv4c8UhAIEXMMVh/dDia2WViv2K5o6WzECvteJDJjBkJocgdgzX58y68vikIy8GgQoe/jlSwXBiKc= X-Received: by 2002:a1c:8013:: with SMTP id b19mr6964072wmd.81.1567278252652; Sat, 31 Aug 2019 12:04:12 -0700 (PDT) MIME-Version: 1.0 References: <1567196510.21824.for-standards-violators@oclsc.org> <20190830215202.GA974@mcvoy.com> <20190831011359.E9F491570CE9@mail.bitblocks.com> <88242A0D-D08E-47EB-84DC-A7205780A417@ccc.com> In-Reply-To: From: Clem Cole Date: Sat, 31 Aug 2019 15:03:46 -0400 Message-ID: To: Dave Horsfall Content-Type: multipart/alternative; boundary="00000000000083ab4705916e67ef" Subject: Re: [TUHS] dmr streams & networking [was: Re: If not Linux, then what?] X-BeenThere: tuhs@minnie.tuhs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: The Unix Heritage Society mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: The Eunuchs Hysterical Society Errors-To: tuhs-bounces@minnie.tuhs.org Sender: "TUHS" --00000000000083ab4705916e67ef Content-Type: text/plain; charset="UTF-8" On Sat, Aug 31, 2019 at 1:38 AM Dave Horsfall wrote: > Yep, that certainly rings a bell. ISTR that Sun had a board with the two > CPUs, one keeping an eye on the other. Interesting, I was under the belief that Sun never even tried the trick (at least as a product). The original Stanford University Network (SUN) CPU was built for an Intel Multibus (electrically and mechanically) but using a single 68000 instead of an Intel processor. The 'SUN' was designed by one of Forest's graduate students (Andy Bechtolsheim ); and the University licensed the design extremely cheaply throughout the valley (VLSI Tech, *a.k.a.* Sun Microsystems, was only one of the licensees. But for instance the original Cisco AGS and the Imagen Laser printers both used CPU's licensed from the Unversity). FWIW: I knew Andy at CMU previously, he had designed a similar board for the CMU front-end as I was leaving for Tektronix - when I was there we used LSI-11s and Andy replaced that with an 8085 (then 8086) based Multibus [IIRC, Phil Karn may have mixed up in all that too - he was hacking on what would become KA9Q TCP on his Z80 and then the 8085. We had all taken the graduate realtime course from Steely Dan as lab partners and our big project was based on hacks to that hardware]. That said, it was Forest that proposed the executor/fixer trick (as I say he gave a paper at an Asilomar Microprocessor Conference which I have sadly misplaced). It is certainly possible that Andy tried building it, but the only two firms that I know of that built processors using the idea were Apollo and Masscomp (neither who used or licensed the SUN CPU design from Stanford) although all of them used a flavor of the Multibus as their first bus. I don't know what Apollo did. The multibus mechanically had two connectors, but the Intel-defined I/O bus was on the lower (larger connector). At, Masscomp the MC-500 a private (synchronous) memory bus, that was very similar to the BI in its protocol (because Dave designed both of course). It was built on the unused/undefined header and ran much faster than the I/O bus since memory fetches occurred. Also, the Masscomp >>card cage<< was larger than Multibus (I think Apollo was also). The shorter boards fit into the backplane, the larger size allowed for more 'chips to fit.' IIRC, with the original memory chips being used at the time, one reason why the Masscomp was so much faster than the Sun-1 (and 2) was it had larger memory capacity on its boards and the memory transaction were quicker. --00000000000083ab4705916e67ef Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable


On Sat, Aug 31, 2019 at 1:38= AM Dave Horsfall <dave@horsfall.or= g> wrote:
Yep, that certainly rings a bell.=C2=A0 ISTR that Sun had a board with the= two
CPUs, one keeping an eye on the other.
Interesting, I = was under the belief that Sun never even tried the trick (at least as a pro= duct).=C2=A0 The original Stanford University Network (SUN) CPU was built f= or an Intel Multibus (electrically and mechanically) but using a single 680= 00 instead of an Intel processor.=C2=A0 The 'SUN' was designed by one of=C2=A0Fore= st's gra= duate students=C2=A0(Andy Bechtolsheim); and the University=C2=A0licensed the des= ign extremely cheaply throughout the valley (VLSI Tech, a.k.a. Sun M= icrosystems, was only one of the licensees.=C2=A0 But for instance the orig= inal Cisco AGS and the Imagen Laser printers both used CPU's licensed f= rom the Unversity).

FWIW: I knew Andy at CMU previo= usly, he had designed a similar board for the CMU front-end as I was leavin= g for Tektronix - when I was there we used LSI-11s and Andy replaced that w= ith an 8085 (then 8086) based Multibus [IIRC, Phil Karn may have mixed up i= n all that too - he was hacking on what would become KA9Q TCP on his Z80 an= d then the 8085.=C2=A0 =C2=A0We had all taken the graduate realtime course = from Steely Dan as lab partners and our big project was based on hacks to t= hat hardware].

That said, it was Forest that propose= d the executor/fixer trick (as I say he gave a paper at an Asilomar Micropr= ocessor Conference which I have sadly misplaced).=C2=A0 =C2=A0It is certain= ly possible that Andy tried building it, but the only two firms that I know= of that built processors using the idea were Apollo and Masscomp (neither = who used or licensed the SUN CPU design from Stanford) although all of them= used a flavor of the Multibus as their first bus.
=
I= don't know what Apollo did. The multibus mechanically had two connecto= rs, but the Intel-defined I/O bus was on the lower (larger connector).=C2= =A0 =C2=A0At, Masscomp the MC-500 a private (synchronous) memory bus, that = was very similar to the BI in its protocol (because Dave designed both of c= ourse).=C2=A0 It was built on the unused/undefined header and ran much fast= er than the I/O bus since memory fetches occurred.=C2=A0 Also, the Masscomp= >>card cage<< was larger than Multibus (I think Apollo was als= o).=C2=A0 =C2=A0The shorter boards fit into the backplane, the larger size = allowed for more 'chips to fit.'=C2=A0 IIRC, with the original memo= ry chips being used at the time, one reason why the Masscomp was so much fa= ster than the Sun-1 (and 2) was it had larger memory capacity on its boards= and the memory transaction were quicker.
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