From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-0.8 required=5.0 tests=DKIM_ADSP_CUSTOM_MED, DKIM_INVALID,DKIM_SIGNED,FREEMAIL_FROM,HTML_MESSAGE,MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 11813 invoked from network); 29 Nov 2022 01:51:17 -0000 Received: from minnie.tuhs.org (50.116.15.146) by inbox.vuxu.org with ESMTPUTF8; 29 Nov 2022 01:51:17 -0000 Received: from minnie.tuhs.org (localhost [IPv6:::1]) by minnie.tuhs.org (Postfix) with ESMTP id A4E6541C08; Tue, 29 Nov 2022 11:50:40 +1000 (AEST) Received: from mail-lf1-f51.google.com (mail-lf1-f51.google.com [209.85.167.51]) by minnie.tuhs.org (Postfix) with ESMTPS id 5E55A41C07 for ; Tue, 29 Nov 2022 11:50:36 +1000 (AEST) Received: by mail-lf1-f51.google.com with SMTP id u27so9261784lfc.9 for ; Mon, 28 Nov 2022 17:50:36 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:from:to:cc:subject:date:message-id:reply-to; bh=RWzPRATjLhwqxCt5hsfZQER4TzUxAXDkSTcmNxvefWA=; b=gl0JovqhpNZ+3IABX2UuR3DIZZ2N8YhQd2ma/I2VtI/SxIWibelSK+NAJFKAk60hj1 ETtQot9hj0Juz/7Qr8y5KE9uIonSq3TBO4IBEYuw26mkGkEJj9RSlgmIKphM00BLuIor 0XA4x/pdAI4RqcfD2KULg1tcOVDoMOsI21KfnVLoowEtbH88uCP0J1mw0I1g8dFxsk7C DgqFtjOAkmkLmiX4wvEpJ6021EU8TWE2zflAOPPodXSw2DYzkAulo8mnR1LNS4SU8EDY q0AlRuhnZ3uhyRNzv/dIYK4fO+tgUyoedkdus8sw4QunSiiaA9GSM25iAXFPPXtow5dU /CgQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:subject:message-id:date:from:in-reply-to:references :mime-version:x-gm-message-state:from:to:cc:subject:date:message-id :reply-to; bh=RWzPRATjLhwqxCt5hsfZQER4TzUxAXDkSTcmNxvefWA=; b=DKaNUCkwePWszZUNUOLFCsvYkrESRhQW6ZPQlfD5LRNOP1qUdJhriPIE7DaS8xt7d7 sX5bD/jXb3PtBOsRk8RZ2o+38p4MXvIaIejhbxQGH7bwpvqtdnMfAej6fD5iFDMHWf2E rQikrgD8CNuM+50FQDChOZRp3Nw6puYqZP0WBdLWM1Vd5CnAvLdwD/ADflqe5WocWdrI 6O7s7Ci//aOcNsZDeyRfLGUE8EuE+Lyb3xSmA9Nw2DhwWFC8q8/mRZS9UOnQ1oHl7jnq bEEqf2A2eCIpBOw6P3sXiONL7ijjviwq5ZaftRrM6cXhwlOgEvWBzi/mhBuasuUuuUsR RQbg== X-Gm-Message-State: ANoB5pmOi7yWRB7PugBn0sfnFL+pWsf2igBLd9l3fsD3oRzMhPFxqVBr 0jFuJKyZLUXdZmP2gaikjHJZHbfhqZWVP1Oojz1k91f/Ppo= X-Google-Smtp-Source: AA0mqf7Xk+8ynI6YTQwhIZajGGJUszZkgcIyagP1tR0NuQjrm5YMXZhygCGbVhDemtaQKxIpGVn0l/bbFkg2ppo7Xos= X-Received: by 2002:ac2:5dea:0:b0:4b2:2cff:8446 with SMTP id z10-20020ac25dea000000b004b22cff8446mr18359550lfq.572.1669686574296; Mon, 28 Nov 2022 17:49:34 -0800 (PST) MIME-Version: 1.0 References: <8f278bf8-de57-4e77-a3b8-d007d7c3a446@app.fastmail.com> <20221126191827.GV18011@mcvoy.com> <764dda08-f358-4c74-8056-ef8fc80bcaac@app.fastmail.com> <20221126232323.GX18011@mcvoy.com> <20221127001714.GY18011@mcvoy.com> <202211270443.2AR4hofO067295@ultimate.com> <0EB50C1F-D226-40BF-8F42-43CB988B036E@jctaylor.com> In-Reply-To: From: Alan Glasser Date: Mon, 28 Nov 2022 20:49:23 -0500 Message-ID: To: Marc Donner Content-Type: multipart/alternative; boundary="00000000000025b1ad05ee9233f7" Message-ID-Hash: HBNNOZ575AYQSYXDUVTTBTNW5O2AVDEE X-Message-ID-Hash: HBNNOZ575AYQSYXDUVTTBTNW5O2AVDEE X-MailFrom: alanglasser@gmail.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; header-match-tuhs.tuhs.org-0; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header CC: The Eunuchs Hysterical Society X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] Re: Reaction to the 3B2 at Bell Labs List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: --00000000000025b1ad05ee9233f7 Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable A few 3B2 stories... In the late 1970's there were no 3B2's (yet), but there was the MAC 8 processor. The name "MAC 8" was problematic to me and my coworkers: it stood for Microprocessor Advisory Committee. It was a processor designed by a committee! It was slow and more problematically, it was not hardware compatible with Intel 8080 support chips. I don't remember all of the details but it was an edge versus level set of problems. It was fun to program. There was an evaluation box (called a MacTutor) that you connected to an RS-232 line to connect it with a PDP-11 UNIX system for cross-assembly/cross-compiling (the assembler language was as close to C as an assembler language could get). The MacTutor was a fun toy. The MAC 8 in production hardware (at least in Holmdel) was a disaster. See https://archive.org/details/bitsavers_westernEleC8TUTORJul79_3968770/mode/2= up In the early 1980's, I was a Bell Labs technical supervisor in a number of different development (in contrast to research) organizations. There was considerable pressure on my management (and me) to utilize 3B2's instead of DEC hardware; a little later (about 1986) there was pressure to use 6300's and later 6386's (which ran UNIX). My first experience with an original 3B2 (one without a model number) was identical to that of John P Linderman's. Compiling a modest C program took forever. A little later they gave that one a model number of 300 and came out with a 400, which was almost reasonable and a 310 which, I believe, had the same processor and clock as a 400 with less expansion slots. Later came the 600 and 700, which were pretty reasonable and we used them for a number of products (DEFINITY Manager 3 for administering a large PBX was one I brought to market with my team). In October, 1996 I was promoted to development department head of Global Messaging Services (GMS) which was better known as AT&T Mail. It was a hectic time to be joining the organization as the job I took had been being filled temporarily by another person (who was a friend of mine and, like me, was new to the organization) and they were in the final throes of development of a significant new release, about to go into system test (in another department). One of the first things I learned is that the service ran on many 3b2/600's mostly in two locations in the US, but had many small worldwide locations (Hong Kong, Tokyo, Sydney, Tel Aviv, London, Moscow, and some others I don't remember) all connected by DataKit. The US systems had been running for many years and could not be powered off, because the disk drives would seize and not spin up due to an absence of lubricant (as I was told). This presented some challenges, as I liked to power cycle systems I worked on and could not do this here. The release was deployed on Valentine's Day, 1997. It was the worst deployment in the service's history. Most everything broke. System test hadn't found these very many latent bugs that were deployed. It was all hands on deck, working all hours 7x24 with two conference calls a day with the Operations organization (running the servers) and the Customer Care organization (fielding customer complaints) until things quieted down towards the end of March. It was then that I was able to pay more attention to future plans, which were to replace the 3B2's with Stratus hardware running their fault tolerant unix (FTX). We had a number of their dual processor systems in lab test and had just taken delivery of a four processor system, which is what my predecessor had specified for purchase to replace all of the US based 3B2's. A group of 3 engineers (one of whom I had hired in 1980) worked on running benchmarks of GMS workloads on the Stratus systems and working with Stratus engineers to get fixes to problems in their code when they arose. They presented the first set of quad processor benchmarks to me and they were all slower than the "twin" (or 2 processor) benchmarks. I requested daily updates on the status of this as it was bizarre and indeed a disaster for our plans. This culminated in my requesting that Stratus send a small group of their FTX engineers to my location for (what I called) a formal architecture review of the Quad and FTX. The review was scheduled for a week. After the first morning, I told them that they should go back to Stratus and that we'd be in touch. I wrote the following in an email to my boss, my product manager peer and a handful of others: Yesterday, 4/15/97, Stratus engineers from their hardware development, FTX (UNIX) development and performance and design groups met with members of GMS R&D and AT&T Labs to share information about the Stratus and GMS architectures. Executive summary: the Quad will never work for GMS. The Stratus 1225 (aka "Twin"), is a true SMP (symmetric multi-processor). = The two CPUs each have a one megabyte instruction cache and a one megabyte data cache, and they both share a memory system of 512 megabytes. Cache coherency is maintained by a pair of custom chips (ASICs). When data is in a processor's cache, there is no contention possible. When data is in the memory system, there is an additional penalty of between 250-390 nanoseconds. Input and output take place on a slower bus. The Stratus 1245 (aka "Quad") consists of two twin boards that communicate via the I/O (i.e., slow) bus. This is not symmetric, hence not SMP. Each board contains 512MB of memory. All of the Unix kernel data resides on one board (the boot board). When a processor on the non-boot board needs to access memory on the boot board, the cost is 1700 nanoseconds (a penalty of 4.4 to 6.8 times worse). Since all Unix kernel data resides on the boot board, any software that makes significant use of Unix system calls (e.g., GMS) will pay a high penalty when running on the non-boot board. Further, if a program (e.g., the GMS User Agent) is simultaneously running on both boards, its instructions will reside in the memory of only one of the boards, thus incurring significant overhead to access instructions for some processes. It appears that the hardware designers never consulted with the Unix designers. They are located in different locations (Massachusetts and California), which can't help. They claim they've seen between 1.4 and 1.6 times improvement in going from Twin to Quad for other customers. They do note, however, that an optimal application for the Quad is one which needs to execute application user-mode instructions and make very few system calls (e.g., a graphics rendering application). GMS, in its current architecture, assumes free and easy access to system calls. GMS can never run well on a Quad. We should immediately abandon any efforts aimed at deploying Quads and focus all of our attention on extracting compensatory Twins from Stratus. Needless to say, we were able to get an appropriate number of Twins and retired all of our 3B2s. Alan On Mon, Nov 28, 2022 at 5:45 PM Marc Donner wrote: > IBM built a major semiconductor fab up in Fishkill, NY. About two hours > drive north of NYC. At one point (mid-1980s) it was the biggest fab in t= he > world according to some metric. > > On Mon, Nov 28, 2022, 17:35 ron minnich wrote: > >> I was visiting Holmdel in 1981, and there was a tradeshow for the BellMA= C >> CPUs there, filling ground floor of the central atrium. There was some >> swag, which I had for a few years, including refrigerator magnets. The o= ne >> I remember: >> "Don't be alone, call MACphone!" >> >> I remember reading an article in the early 80s pointing out that, due to >> the scale of the Bell System, the center of the universe of semiconducto= r >> fabrication at that time was ... Allentown, PA. Western Electric had an = ad, >> along the lines of, "who will create the 256 Kb memory part? WE will" --= WE >> as in Western Electric.Those parts would have been fabbed in Allentown >> IIRC. >> >> It is a bit hard to recall, much less believe. but PA, land of dead >> still mills, the Molly Maguires, and underground coal mine fires that wi= ll >> burn for centuries, also had silicon. >> >> >> >> >> On Mon, Nov 28, 2022 at 1:01 PM Kenneth Goodwin < >> kennethgoodwin56@gmail.com> wrote: >> >>> That must be the 300 B superhive model CPU >>> >>> On Mon, Nov 28, 2022, 1:54 PM William Corcoran wrote= : >>> >>>> I have a 3b2/300. Anytime you run a command that is compute bound, >>>> like factoring a large prime number, the CPU buzzes! >>>> >>>> >>>> >>>> Bill Corcoran >>>> >>>> >>>> >>>> >>>> >>>> On Nov 27, 2022, at 9:52 AM, John P. Linderman >>>> wrote: >>>> >>>> =EF=BB=BF >>>> >>>> [EXTERNAL] >>>> >>>> >>>> We were "gifted" a 3B2, as in "take this and use it!". I ran a "ps" >>>> command in single user mode, and it took 20 seconds to run. >>>> Our machine names were themed around bird names, so we christened the >>>> 3B2 "junco". Our director said we had to get along, >>>> so we renamed it "jay". But everyone knew what the J stood for. The 3B= 2 >>>> served as a doorstop. >>>> >>>> On Sat, Nov 26, 2022 at 11:44 PM Phil Budne wrote: >>>> >>>>> Larry McVoy wrote: >>>>> > I read the Wikipedia page on the 9000. It's sad that the 9000 >>>>> > wasn't cancelled when they had better alternatives. >>>>> >>>>> In an oral history Bob Supnik described Ken Olsen couldn't get his >>>>> head around the fact that the NVAX chip could equal the 9000: >>>>> >>>>> @2:59:45 in https://www.youtube.com/watch?v=3DT3tcCBHRIfU >>>>> >>>>> In part 2, Bob described how then DEC VP Gordon Bell having earlier >>>>> predicted when the microprocessor performance curve would cross over >>>>> minis and mainframes: >>>>> >>>>> @1:51:45 in https://www.youtube.com/watch?v=3DT3tcCBHRIfU >>>>> >>>>> He also talks about how the company couldn't command the bsame gross >>>>> margins as it did in the VAX era. >>>>> >>>> >>>> >>>> THIS IS AN EXTERNAL EMAIL -- This email was sent from someone OUTSIDE >>>> of the NSM Insurance Group email system. PLEASE USE CAUTION WHEN REVIE= WING >>>> THIS EMAIL. >>>> >>>> --00000000000025b1ad05ee9233f7 Content-Type: text/html; charset="UTF-8" Content-Transfer-Encoding: quoted-printable
A few 3B2 stories...

In the late 1970&#= 39;s =C2=A0there were no 3B2's (yet), but there was the MAC 8 processor= .=C2=A0 The name "MAC 8" was problematic to me and my coworkers: = it stood for Microprocessor Advisory Committee.=C2=A0 It was a processor de= signed by a committee!=C2=A0 It was=C2=A0slow and more problematically, it = was not hardware compatible with Intel 8080 support chips.=C2=A0 I don'= t remember all of the details but it was an edge versus level set of proble= ms.=C2=A0 It was fun to program.=C2=A0 There was an evaluation box (called = a MacTutor) that you connected to an RS-232 line to connect it with a PDP-1= 1 UNIX system for cross-assembly/cross-compiling (the assembler language wa= s as close to C as an assembler language could get).=C2=A0 The MacTutor was= a fun toy.=C2=A0 The MAC 8 in production hardware (at least in Holmdel) wa= s a disaster.=C2=A0 See=C2=A0https://archive.org/details/bit= savers_westernEleC8TUTORJul79_3968770/mode/2up

=
In the early 1980's, I was a Bell Labs technical supervisor in a n= umber of different development (in contrast to research) organizations. The= re was considerable pressure on my management (and me) to utilize 3B2's= instead of DEC hardware; a little later (about 1986) there was pressure to= use 6300's and later 6386's (which ran UNIX).

=
My first experience with an original 3B2 (one without a model number) = was identical to that of John P Linderman's.=C2=A0 Compiling a modest C= program took forever.=C2=A0 A little later they gave that one a model numb= er of 300 and came out with a 400, which was almost reasonable and a 310 wh= ich, I believe, had the same processor and clock as a 400 with less expansi= on slots. Later came the 600 and 700, which were pretty reasonable and we u= sed them for a number of products (DEFINITY Manager 3 for administering a l= arge PBX was one I brought=C2=A0to market with my team).

In October, 1996 I was promoted to development department head of Gl= obal Messaging Services (GMS) which was better known as AT&T Mail.=C2= =A0 It was a hectic time to be joining the organization as the job I took h= ad been being filled temporarily by another person (who was a friend of min= e and, like me, was new to the organization) and they were in the final thr= oes of development of a significant new release, about to go into system te= st (in another department).=C2=A0 One of the first things I learned is that= the service ran on many 3b2/600's mostly in two locations in the US, b= ut had many small worldwide locations (Hong Kong, Tokyo, Sydney, Tel Aviv, = London, Moscow, and some others I don't remember) all connected by Data= Kit.=C2=A0 The US systems had been running for many years and could not be = powered off, because the disk drives would seize=C2=A0and not spin up due t= o an absence of lubricant (as I was told).=C2=A0 This presented some challe= nges, as I liked to power cycle systems I worked on and could not do this h= ere.=C2=A0 The release was deployed on Valentine's Day, 1997.=C2=A0 It = was the worst deployment in the service's history.=C2=A0 Most everythin= g broke.=C2=A0 System test hadn't found these very many latent bugs tha= t were deployed.=C2=A0 It was all hands on deck, working all hours 7x24 wit= h two conference calls a day with the Operations organization (running the = servers) and the Customer Care organization (fielding customer complaints) = until things quieted down towards the end of March.

It was then that I was able to pay more attention to future plans, which = were to replace the 3B2's with Stratus hardware running their fault tol= erant unix (FTX).=C2=A0 We had a number of their dual processor systems in = lab test and had just taken delivery of a four processor system, which is w= hat my predecessor had specified for purchase to replace all of the US base= d 3B2's.=C2=A0 A group of 3 engineers (one of whom I had hired in 1980)= worked on running benchmarks of GMS workloads on the Stratus systems and w= orking with Stratus engineers to get fixes to problems in their code when t= hey arose.=C2=A0 They presented the first set of quad processor benchmarks = to me and they were all slower than the "twin" (or 2 processor) b= enchmarks.=C2=A0 I requested daily updates on the status of this as it was = bizarre and indeed a disaster for our plans.=C2=A0 This culminated in my re= questing that Stratus send a small group of their FTX engineers to my locat= ion for (what I called) a formal architecture review of the Quad and FTX.= =C2=A0 The review was scheduled for a week.=C2=A0 After the first morning, = I told them that they should go back to Stratus and that we'd be in tou= ch.=C2=A0 I wrote the following in an email to my boss, my product manager = peer and a handful of others:

Yesterday, 4/15/97, Stratus engineers from their hardware deve= lopment, FTX (UNIX) development and performance and design groups met with = members of GMS R&D and AT&T Labs to share information about the Str= atus and GMS architectures.


Executive summary: the Quad will never work for GMS.


=

The Stratus 1225 (ak= a "Twin"), is a true SMP (symmetric multi-processor).=C2=A0 The two CPUs each have a one= megabyte instruction cache and a one megabyte data cache, and they both sh= are a memory system of 512 megabytes.=C2=A0 Cache coherency is maintained by a pair of custom chips= (ASICs). When data is in a processor's cache, there is no contention p= ossible.=C2=A0 When data= is in the memory system, there is an additional penalty of between 250-390= nanoseconds. Input and output take place on a slower bus.


The Stratus 1245 (aka "Q= uad") consists of two twin boards that communicate via the I/O (i.e., = slow) bus. This is not symmetric, hence not SMP.=C2=A0 Each board contains 512MB of memory.=C2=A0 All of the Unix kernel da= ta resides on one board (the boot board).=C2=A0 When a processor on the non-boot board needs to acc= ess memory on the boot board, the cost is 1700 nanoseconds (a penalty of 4.= 4 to 6.8 times worse).


Since all Unix kernel data resides on the boot board, any softwar= e that makes significant use of Unix system calls (e.g., GMS) will pay a hi= gh penalty when running on the non-boot board. Further, if a program (e.g.,= the GMS User Agent) is simultaneously running on both boards, its instruct= ions will reside in the memory of only one of the boards, thus incurring si= gnificant overhead to access instructions for some processes.


=

It appears that the hardwa= re designers never consulted with the Unix designers. They are located in d= ifferent locations (Massachusetts and California), which can't help.=C2=A0 They claim they'= ve seen between 1.4 and 1.6 times improvement in going from Twin to Quad fo= r other customers. They do note, however, that an optimal application for t= he Quad is=C2=A0

one which needs to execu= te application user-mode instructions and make very few system calls (e.g.,= a graphics rendering application).=C2=A0 GMS, in its current architecture, assumes free and easy a= ccess to system calls.=C2=A0 GMS can never run well on a Quad.


We should immediately abandon any efforts aimed a= t deploying Quads and focus all of our attention on extracting compensatory= Twins from Stratus.

=

Needless to say, we were able to get an appropriate number of Twins and ret= ired all of our 3B2s.

Alan





On Mon, Nov 28, 2022 at 5:45 PM M= arc Donner <marc.donner@gmail.c= om> wrote:
IBM built a m= ajor semiconductor fab up in Fishkill, NY.=C2=A0 About two hours drive nort= h of NYC.=C2=A0 At one point (mid-1980s) it was the biggest fab in the worl= d according to some metric.

On Mon, Nov 28, 2022, 17:35 ron minnich <rminnich@gmail.com&= gt; wrote:
I was visiting Holmde= l in 1981, and there was a tradeshow for the BellMAC CPUs there, filling gr= ound floor of the=C2=A0central atrium. There was some swag, which I had for= a few years, including refrigerator magnets. The one I remember:
"= ;Don't be alone, call MACphone!"

I rememb= er reading an article in the early 80s pointing out that, due to the scale = of the Bell System, the center of the universe=C2=A0of semiconductor fabric= ation at that time was ... Allentown, PA. Western Electric had an ad, along= the lines of, "who will create the 256 Kb memory=C2=A0part? WE will&q= uot; -- WE as in Western Electric.Those parts would have been fabbed in All= entown IIRC.=C2=A0

=C2=A0It is a bit hard to recal= l, much less believe. but PA, land of dead still mills, the Molly Maguires,= and underground coal mine fires that will burn for centuries, also had sil= icon.




On Mon, Nov 28, 202= 2 at 1:01 PM Kenneth Goodwin <kennethgoodwin56@gmail.com>= wrote:
That must be the 300 B = superhive model CPU

On Mon, Nov 28, 2022, 1:54 PM William Corcoran <wlc@jct= aylor.com> wrote:
I have a 3b2/300.=C2=A0 Anytime you run a command that is compute bound, li= ke factoring a large prime number, the CPU buzzes!



Bill Corcoran


=C2= =A0
=C2=A0
=C2=A0
On Nov 27, 20= 22, at 9:52 AM, John P. Linderman <jpl.jpl@gmail.com> w= rote:

=EF=BB=BF

= [EXTERNAL]<= /p>


We were "gifted= " a 3B2, as in "take this and use it!". I ran a "ps&quo= t; command in single user mode, and it took 20 seconds to run.
Our machine names we= re themed around bird names, so we christened the 3B2 "junco". Ou= r director said we had to get along,
so we renamed it &qu= ot;jay". But everyone knew what the J stood for. The 3B2 served as a d= oorstop.

On Sat, Nov 26, 2022 at 11:44 PM Phil= Budne <phil@ultimate.com> wrote:
Larry McVoy wrote:
> I read the Wikipedia page on the 9000.=C2=A0 It's sad that the 900= 0
> wasn't cancelled when they had better alternatives.

In an oral history Bob Supnik described Ken Olsen couldn't get his
head around the fact that the NVAX chip could equal the 9000:

@2:59:45 in https://www.youtube.com/watch?v=3DT3tcCBHRIfU

In part 2, Bob described how then DEC VP Gordon Bell having earlier
predicted when the microprocessor performance curve would cross over
minis and mainframes:

@1:51:45 in https://www.youtube.com/watch?v=3DT3tcCBHRIfU

He also talks about how the company couldn't command the bsame gross margins as it did in the VAX era.


THIS IS AN EXTERNAL EMAIL -- This email was sent from someone OUTSIDE of th= e NSM Insurance Group email system. PLEASE USE CAUTION WHEN REVIEWING THIS = EMAIL.
--00000000000025b1ad05ee9233f7--