From: Warner Losh <imp@bsdimp.com>
To: Noel Chiappa <jnc@mercury.lcs.mit.edu>
Cc: TUHS main list <tuhs@minnie.tuhs.org>
Subject: Re: [TUHS] Accessing the PDP-11/70 MMU registers and the kernel's u area
Date: Sun, 14 Jun 2020 09:52:26 -0600 [thread overview]
Message-ID: <CANCZdfrQgkdCwVLdN7sFiMeT3dRTKp1Z_0G3DUYHmr9AmhNnUQ@mail.gmail.com> (raw)
In-Reply-To: <20200614144643.E4BBF18C09D@mercury.lcs.mit.edu>
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On Sun, Jun 14, 2020 at 8:47 AM Noel Chiappa <jnc@mercury.lcs.mit.edu>
wrote:
> Not sure how different 2.11 is; I know it uses
> one block of kernel address space to map in code overlays, but I don't know
> all the details of how it works.
>
Yes. There's 1 8kB instruction segment that implements the overlays. The
calls to these routines are bounced through thunks that flips the segment
register if needed on the call. Each overlay is limited to 8k. The 2.11BSD
kernel has about 70k of overlays these days... and they are all almost
full, as is the text segment (which is limited to 56k). They get around
this by running the TCP/IP stack in supervisor mode, kinda as a process..
This means the total size of the kernel and data for the kernel is 320k on
a machine with a 128k address space :).
I've been looking a lot at that code lately... I'm back to patch 0, but am
missing ld.c and ranlib.c in my push to get back to the start since they
were augmented between 2.10.1 and 2.11 for the new portable archive
format... Once I solve those two, it's off to build testing in simh.
Warner
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next prev parent reply other threads:[~2020-06-14 15:53 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-06-14 14:46 Noel Chiappa
2020-06-14 15:52 ` Warner Losh [this message]
2020-06-14 16:13 ` Diomidis Spinellis
-- strict thread matches above, loose matches on Subject: below --
2020-06-14 8:33 Diomidis Spinellis
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