I'm probably Stockholm Syndrommed about 6502. It's what I grew up on, and I still like it a great deal. Admittedly register-starved (well, unless you consider the zero page a whole page of registers), but...simple, easy to fit in your head, kinda wonderful.
I'd love a 64-bit 6502-alike (but I'd probably give it more than three registers). I mean given how little silicon (or how few FPGA gates) a reasonable version of that would take, might as well include 65C02 and 65816 cores in there too with some sort of mode-switching instruction. Wouldn't a 6502ish with 64-bit wordsize and a 64-bit address bus be fun? Throw in an onboard MMU and FPU too, I suppose, and then you could have a real system on it.
32-bit SPARC was kind of fun and felt kind of like 6502. The 6502 wasn't exactly RISCy...but when working with RISC architectures, understanding the 6502 seemed to be helpful.
I really liked the 68000, but in a different way. It's a nice, regular, easy-to-understand instruction set without many surprises, and felt to me like it had plenty of registers. Once the 68030 brought the MMU onboard it was glorious.
Post-370 (which is to say 390/z IBM mainframe architectures) went wild with microprogrammed crazy baroque very, very special purpose instructions. Which, I mean, OK, cool, I guess, but not elegant.
I don't really know enough about the DEC architectures. It is my strong impression that the PDP-11 is regular, simple to understand, and rather delightful (like I find the 68000), while VAX gets super-baroque like later IBM mainframe instruction sets. Although I've worked with emulated 10s, 11s, and VAXen, I've never really done anything in assembly (sure, you can argue that C is the best PDP-11 preprocessor there is) on them.