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List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: The DG Nova had a pretty nice architecture. 2 accumulators, 2 index register= s, program counter, status register. No stack register tho. There was a micr= o processor version by Fairchild.=20 Sent from my iPhone > On 5 Jul 2024, at 5:36 pm, Dave Horsfall wrote: >=20 > =EF=BB=BFOn Thu, 4 Jul 2024, Adam Thornton wrote: >=20 >> ARM or one of the smaller RISC-V flavor-sets (RISC-V is super-modular)=20= >> would be a perfectly reasonable architecture to learn these days. After=20= >> the PDP-11 but before ARM I'd'a suggested 68000. Definitely NOT x86 and=20= >> its betentacled descendants. Even so, you'd still want to treat it (if=20= >> you're learning "how do computers work?") as if it were not superscalar, >> even though it obviously is. Which I guess is pushing me into "please=20= >> let me just pretend it's a PDP-11 and keep all the scary pipelining and=20= >> speculative execution and all the things that are hard to reason about=20= >> below the layer where I need to care" territory. >=20 > Pretty much anything with a linear address space, an orthogonal=20 > instruction set, and a stack will do, I think. >=20 > Was it John Gilmore who said "Segment registers are for worms"? >=20 > I dips me lid to those souls who implemented ALGOLW on the 360... >=20 >> And yeah, if you need me to sweep the floors, I'll sweep the floors, but=20= >> if I'm needed to sweep the floors often, there's a management problem=20 >> here, in that you can hire people who are much better at sweeping floors=20= >> than I am for much less money than you hired me to do software=20 >> engineering for. >=20 > I've worked in places where I've swept the floor (and also did the dishes=20= > etc); I'll still need to be paid the same salary, though :-) >=20 > -- Dave