From mboxrd@z Thu Jan 1 00:00:00 1970 X-Spam-Checker-Version: SpamAssassin 3.4.4 (2020-01-24) on inbox.vuxu.org X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI autolearn=ham autolearn_force=no version=3.4.4 Received: (qmail 25443 invoked from network); 10 Apr 2023 18:28:28 -0000 Received: from minnie.tuhs.org (50.116.15.146) by inbox.vuxu.org with ESMTPUTF8; 10 Apr 2023 18:28:28 -0000 Received: from minnie.tuhs.org (localhost [IPv6:::1]) by minnie.tuhs.org (Postfix) with ESMTP id E76D9411EA; Tue, 11 Apr 2023 04:28:20 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tuhs.org; s=dkim; t=1681151301; h=from:from:reply-to:reply-to:subject:subject:date:date: message-id:message-id:to:to:cc:mime-version:mime-version: content-type:content-type: content-transfer-encoding:content-transfer-encoding:list-id:list-help: list-owner:list-unsubscribe:list-subscribe:list-post; bh=jFACgWNlshw6WcjHKx7/VOUmAgHeSJTTeoXp82JMlRI=; b=Dzl3jy7EOUhR8ozFmJ8l4b++qjjTXsPzaK/ccvnDG2xOALlpvwMj6YDS5oUx1xWEd7XxpJ f2NooXH2GtkKNE2xKtHMEFLjkJyy38oZPjM45Y+rqL1RKWfW+eq4dvTz+l8ym6K8GKXrTD 9CjbNQI+YaXXQNk6Q9msi4mdwhpuIUA= Received: from mail-4318.protonmail.ch (mail-4318.protonmail.ch [185.70.43.18]) by minnie.tuhs.org (Postfix) with ESMTPS id 73C1C40EB4 for ; Tue, 11 Apr 2023 04:28:07 +1000 (AEST) Date: Mon, 10 Apr 2023 18:27:51 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=protonmail.com; s=protonmail3; t=1681151285; x=1681410485; bh=jFACgWNlshw6WcjHKx7/VOUmAgHeSJTTeoXp82JMlRI=; h=Date:To:From:Subject:Message-ID:Feedback-ID:From:To:Cc:Date: Subject:Reply-To:Feedback-ID:Message-ID:BIMI-Selector; b=NSJM5Y++a4Qtuj4oL4vJTYrbQhBhZzIAwktO/aM8XpRaYghkK8QjSsMyu3AvVAFyp hA2jITJypJr9JwE6JGDYQfwOtXTb/Um/4QwdqPAV4dnalyIv7VEMEEFliuS8nfhmXF v63wnebCxXuJ9uDFpRGAgC7WqE8fBRbDpL0dhS3HEjwTprbV3uPsYskoyrpdlxVbLG WLFnWBvA41sf1H2QScN4NcimcxRrGZtnfTNeCw68NvEUipzjU4cTSX1w6PPIhMM0N4 43J2LRoZWpxUnjlNs2SaClbl1DDMyD9MlZCDQTDqg9IUt+aRiVERomSg09Ov027BLw sOFuJfzD5wjSA== To: The Eunuchs Hysterical Society Message-ID: Feedback-ID: 35591162:user:proton MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Message-ID-Hash: NY653OXL5R5UEKXCBPZHWWVU2GKBJ7GU X-Message-ID-Hash: NY653OXL5R5UEKXCBPZHWWVU2GKBJ7GU X-MailFrom: segaloco@protonmail.com X-Mailman-Rule-Misses: dmarc-mitigation; no-senders; approved; emergency; loop; banned-address; member-moderation; nonmember-moderation; administrivia; implicit-dest; max-recipients; max-size; news-moderation; no-subject; digests; suspicious-header X-Mailman-Version: 3.3.6b1 Precedence: list Subject: [TUHS] UNIX "Machine Layer" Standards List-Id: The Unix Heritage Society mailing list Archived-At: List-Archive: List-Help: List-Owner: List-Post: List-Subscribe: List-Unsubscribe: From: segaloco via TUHS Reply-To: segaloco Good day everyone. I'm taking a bit of a break from my documentation stuff= and veering back towards some embedded systems work and have the burning q= uestion on my mind this morning: Was there any coordination between differ= ent groups engaged in porting efforts at Bell regarding machine layer imple= mentations? In other words, was there any sort of common design of "get a stack pointer= , do on the protection hardware, move the binary to address , cl= ear bss, etc." that was followed as lore when working up new machine bootst= raps, or was that sort of work a bit more siloed? For instance, when worki= ng on the VAX port, was the crew more likely stepping through mch replicati= ng things based on what the PDP-11 was doing, was the startup more derived = from DEC literature, or was there no single guiding principle and each mach= ine came up, at that level at least, in a relative vacuum, with only the ma= chine interface to UNIX being the guiding principle? Where I'm trying to put this sort of knowledge into use is I'm starting to = spec out a kernel bootstrap for the RPi Pico and Pine64 Ox64 boards (ARM32 = and RISCV64 respectively) that is not only sufficient to start a V7-ish ker= nel on each, but that are ultimately based on the same design, varying lite= rally only where the hardware strictly necessitates it, but similar enough = that reading the two assembly files side by side yields essentially the exa= ct same discrete operations. What I don't know is if I'm barking up the wr= ong tree and it was already settled in the 70s that machines are sufficient= ly different enough that you can't really just set forth one abstract "mach= ine startup" design that actually includes all those CPU-level concerns suc= h as protection, stack config, context switching, etc. I know even today p= eering into sources of stuff like Linux and seL4, the "ml" for each seems t= o have been built by a different person/group rather than someone setting o= ut with a CPU bootstrap design and implementing the same on each chip. So boiled down to a one liner: Was there a guiding document/design/memoran= da for the mch/ml components of UNIX in Bell, or was each one designed more= "on-the-fly" as the particulars of the hardware were sorted out? - Matt G.