* awesome mips performance
@ 2016-12-16 19:25 Jason A. Donenfeld
2016-12-18 19:54 ` Mic92
0 siblings, 1 reply; 2+ messages in thread
From: Jason A. Donenfeld @ 2016-12-16 19:25 UTC (permalink / raw)
To: WireGuard mailing list
Hey guys,
The latest snapshot is broken on big endian. This commit [1] fixes it,
and will be released in the next snapshot shortly. Sorry about that.
Lots of churn with the siphash implementation.
With the recent changes to add alignment in the headers, I now get 60
megabits per second on a super crappy TL-WR841N board (QCA9533)
transmitting over the internet. This is awesome performance -- a good
milestone for little CPUs.
Jason
[1] https://git.zx2c4.com/WireGuard/commit/?id=094e95e736723075d586d7a006c5525f2e3a74d4
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: awesome mips performance
2016-12-16 19:25 awesome mips performance Jason A. Donenfeld
@ 2016-12-18 19:54 ` Mic92
0 siblings, 0 replies; 2+ messages in thread
From: Mic92 @ 2016-12-18 19:54 UTC (permalink / raw)
To: wireguard
I can tell from experience, that this device is indeed super crappy. Respect!
It barley routes 100mbit/s from LAN to WAN.
On 2016-12-16 20:25, Jason A. Donenfeld wrote:
> With the recent changes to add alignment in the headers, I now get 60
> megabits per second on a super crappy TL-WR841N board (QCA9533)
> transmitting over the internet. This is awesome performance -- a good
> milestone for little CPUs.
^ permalink raw reply [flat|nested] 2+ messages in thread
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