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* [9fans] PXE bootings
@ 2005-04-05 22:20 Brantley Coile
  2005-04-05 23:53 ` jmk
  0 siblings, 1 reply; 5+ messages in thread
From: Brantley Coile @ 2005-04-05 22:20 UTC (permalink / raw)
  To: 9fans

I'm booting a new box with new Intel GbE
interfaces and I have a question.  Here is my
ndb/local entry for the box:


ip=205.185.197.25 ether=00304881bd66 sys=rb1
	dom=rb1.coraid.com
	bootf=/386/9pxeload
	

Here's my /cfg/pxe/00304881bd66

*nomp=1
ether0=type=igbe
ether1=type=igbe
fs=205.185.197.1
auth=205.185.197.2
console=0
bootfile=ether0!/386/9pccpu
bootargs=il -g 205.185.197.254 ether /net/ether0 205.185.197.25 255.255.255.0

On the serial console I see: bootp timed out
Then I load the kernel

atlas (205.185.197.2!67): /386/9pccpu
664555+521640+124596=1310791
entry: 0x80100020

Plan 9
cpu0: 2995MHz GenuineIntel P4 (cpuid: AX 0x0F29 DX 0xBFEBFBFF)
ELCR: 0E20
pcirouting: ignoring south bridge PCI.0.31.0 8086/25A1


That's the last I see of it.  I'm putting entries
into certain switch statements to id the part.
Etherigbe.c doesn't include the 82541 or the 82547.  I have
both on this motherboard.

What do I need to do to keep it form waiting on
the bootp?

Has anyone already put the did's in for the 82541 and the 82547?

  Brantley



^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [9fans] PXE bootings
  2005-04-05 22:20 [9fans] PXE bootings Brantley Coile
@ 2005-04-05 23:53 ` jmk
  2005-04-06  0:03   ` Brantley Coile
  0 siblings, 1 reply; 5+ messages in thread
From: jmk @ 2005-04-05 23:53 UTC (permalink / raw)
  To: 9fans

On Tue Apr  5 18:22:08 EDT 2005, brantley@coraid.com wrote:
> ...
> Has anyone already put the did's in for the 82541 and the 82547?
> 
>   Brantley

it's unlikely those 2 chips will work simply by adding the device ids
to the driver, they have a different phy that maybe needs special set up
and some other issues (information gleaned by looking at the intel
driver).

--jim


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [9fans] PXE bootings
  2005-04-05 23:53 ` jmk
@ 2005-04-06  0:03   ` Brantley Coile
  2005-04-06  0:15     ` jmk
  2005-04-06  0:16     ` geoff
  0 siblings, 2 replies; 5+ messages in thread
From: Brantley Coile @ 2005-04-06  0:03 UTC (permalink / raw)
  To: 9fans

[-- Attachment #1: Type: text/plain, Size: 220 bytes --]

Are these phy issues just details, or would you expect
I would have to do lots of effort for this?
Why can't the phys just work!!  (Not a question; well, mabye
it is a question--Why do I have to mess with the phys?)

[-- Attachment #2: Type: message/rfc822, Size: 2463 bytes --]

From: jmk@plan9.bell-labs.com
To: 9fans@cse.psu.edu
Subject: Re: [9fans] PXE bootings
Date: Tue, 5 Apr 2005 19:53:35 -0400
Message-ID: <c9e71c626c94c5bbec09a2bc82d2f2ed@plan9.bell-labs.com>

On Tue Apr  5 18:22:08 EDT 2005, brantley@coraid.com wrote:
> ...
> Has anyone already put the did's in for the 82541 and the 82547?
> 
>   Brantley

it's unlikely those 2 chips will work simply by adding the device ids
to the driver, they have a different phy that maybe needs special set up
and some other issues (information gleaned by looking at the intel
driver).

--jim

^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [9fans] PXE bootings
  2005-04-06  0:03   ` Brantley Coile
@ 2005-04-06  0:15     ` jmk
  2005-04-06  0:16     ` geoff
  1 sibling, 0 replies; 5+ messages in thread
From: jmk @ 2005-04-06  0:15 UTC (permalink / raw)
  To: 9fans


On Tue Apr  5 20:08:34 EDT 2005, brantley@coraid.com wrote:

> Are these phy issues just details, or would you expect
> I would have to do lots of effort for this?
> Why can't the phys just work!!  (Not a question; well, mabye
> it is a question--Why do I have to mess with the phys?)
> 

i think there's going to be a moderate amount of effort
required. the good news is there is someone already struggling
with it, that's how i knew the answer (it's not me, i don't
have any of these cards). however, it's up to him/her to make
it known if they succeed or fail.

--jim


^ permalink raw reply	[flat|nested] 5+ messages in thread

* Re: [9fans] PXE bootings
  2005-04-06  0:03   ` Brantley Coile
  2005-04-06  0:15     ` jmk
@ 2005-04-06  0:16     ` geoff
  1 sibling, 0 replies; 5+ messages in thread
From: geoff @ 2005-04-06  0:16 UTC (permalink / raw)
  To: 9fans

As a software person, I'd say that you have to mess with the phys
because of incompetent hardware design.  Yes, the phys should just
come up in a usable state.  But more and more (crap) hardware now
requires software to be intimately familiar with it and configure it
before it can be used.



^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2005-04-06  0:16 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2005-04-05 22:20 [9fans] PXE bootings Brantley Coile
2005-04-05 23:53 ` jmk
2005-04-06  0:03   ` Brantley Coile
2005-04-06  0:15     ` jmk
2005-04-06  0:16     ` geoff

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