From: Jakub Jermar <jj@comberg.cz>
To: 9fans@cse.psu.edu
Subject: Re: [9fans] Kernel question: i386 test-and-set problem
Date: Tue, 11 Jul 2000 08:51:44 +0000 [thread overview]
Message-ID: <8kdhun$1gk7$1@news.vol.cz> (raw)
In-Reply-To: <200007101240.IAA27005@cse.psu.edu>
> It looks atomic to me. The Intel 386 instruction set
> manual says
>
> XCHG exchanges two operands. The operands can be in either
> order. If a memory operand is involved, BUS LOCK is
> asserted for the duration of the exchange, regardless of the
> presence or absence of the LOCK prefix or of the value of
> the IOPL.
Ok, thank you for clarification. Now I see how it works. It really is atomic
in the terms of atomic exchange (which is good because nobody can be
exchanging it concurrently). Looks like I was confused by its name -
test-and-set - which it is really not. It's rather
safely-set-and-leave-the-test-to-the-caller.
Thanks,
Jakub Jermar
next prev parent reply other threads:[~2000-07-11 8:51 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2000-07-10 12:40 Russ Cox
2000-07-11 8:51 ` Jakub Jermar [this message]
-- strict thread matches above, loose matches on Subject: below --
2000-08-03 9:56 miller
2000-08-02 16:24 presotto
2000-08-02 15:43 jmk
2000-08-02 14:51 miller
2000-08-02 13:20 presotto
2000-08-02 8:32 miller
2000-07-31 17:26 presotto
2000-07-23 14:41 miller
2000-07-21 13:15 presotto
2000-07-21 9:10 miller
2000-07-20 17:09 presotto
2000-07-20 13:54 miller
2000-07-20 2:03 jmk
2000-07-10 16:21 miller
2000-07-10 9:57 Jakub Jermar
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