[9fans] JTAG

[9fans] JTAG

[Jeff Sickel]

At the latest IWP9 I caught wind of interest in getting a JTAG file system added into Plan 9.  There were more details than just the file system and USB connectivity that are still a little foggy.  At first I didn't show to much enthusiasm but things have changed in a few short weeks!

What's the status of the effort?

Does a shipment of ice cream need to be arranged for the developers?

-jas

Re: [9fans] JTAG

[Skip Tavakkolian]

Gorka was working on it.  The hope is that it would help debug usb/bt
device issues on kw.

Can ice cream survive an ORD-MAD trip?

-Skip

On Tue, Oct 26, 2010 at 10:49 AM, Jeff Sickel <jas@corpus-callosum.com> wrote:
> At the latest IWP9 I caught wind of interest in getting a JTAG file system added into Plan 9.  There were more details than just the file system and USB connectivity that are still a little foggy.  At first I didn't show to much enthusiasm but things have changed in a few short weeks!
>
> What's the status of the effort?
>
> Does a shipment of ice cream need to be arranged for the developers?
>
> -jas
>
>
>

Re: [9fans] JTAG

[Bruce Ellis]

Yes please.CDM-64 has a jtag everywere you look.

I recall that a pitcher of Blue Moon at the Fun House makes Gorka happy.

brucee

On Wed, Oct 27, 2010 at 5:20 AM, Skip Tavakkolian
<skip.tavakkolian@gmail.com> wrote:
> Gorka was working on it.  The hope is that it would help debug usb/bt
> device issues on kw.
>
> Can ice cream survive an ORD-MAD trip?
>
> -Skip
>
> On Tue, Oct 26, 2010 at 10:49 AM, Jeff Sickel <jas@corpus-callosum.com> wrote:
>> At the latest IWP9 I caught wind of interest in getting a JTAG file system added into Plan 9.  There were more details than just the file system and USB connectivity that are still a little foggy.  At first I didn't show to much enthusiasm but things have changed in a few short weeks!
>>
>> What's the status of the effort?
>>
>> Does a shipment of ice cream need to be arranged for the developers?
>>
>> -jas
>>
>>
>>
>
>

Re: [9fans] JTAG

[Steve Simon]

I am intrigued, what facalities would jtag software provide on plan9,
is the idea a virtual filesystem which would communicate with a fairly
dumb jtag interface connected to (say) a PC's printer parallel port,
or may there is some standardised USB interface?

I jse jtag probes from time to time but I have never thought about the code to
implement what is on the probe...

What was discussed (roughly).

-Steve

Re: [9fans] JTAG

[EBo]

 I've used JTAG to debug and program a couple of embedded systems.  I
 even had an automated regression test suite that tested some AVR
 hardware using gdb running on Gentoo talking to an JTAG.  Freaky but
 fun.

 If I recall correctly many chips will allow you to see and twiddle
 internal registers and states of sub-blocks in the integrated circuits.
 I never had the call to go to that level, but some have.  What little I
 remember is that the JTAG standard dictates the timing and pin-out on a
 20 pin connector.  But I also remember that the ARM and AVR JTAG units I
 saw do not play together, but there might be some universal JTAG
 interfaces now.

 Several years ago I was told to stay clear of the USB interfaced JATGs
 and to use a USB/RS232 converter hooked up to a RS232/JTAG interface as
 this was more reliable.  That was years ago, and things are likely more
 stable now.  I also remember seeing some open source hardware/software
 JTAG efforts.  That might make a good place to start working through the
 JTAG protocal.

 Hope that helps.

   EBo --

 On Tue, 26 Oct 2010 19:49:46 +0100, Steve Simon wrote:
> I am intrigued, what facalities would jtag software provide on plan9,
> is the idea a virtual filesystem which would communicate with a
> fairly
> dumb jtag interface connected to (say) a PC's printer parallel port,
> or may there is some standardised USB interface?
>
> I jse jtag probes from time to time but I have never thought about
> the code to
> implement what is on the probe...
>
> What was discussed (roughly).
>
> -Steve

Re: [9fans] JTAG

[EBo]

 I just ran into the following FAQ and info that might be of help:

 a JTAG FAQ: http://hri.sourceforge.net/tools/jtag_faq_org.html

 interesting detail:

 TAG specification is in Std IEEE 1149.1 (costs about $100). I don't
 have it. Please search at internet for some JTAG related documents.
 This is good: http://www-s.ti.com/sc/psheets/ssya002c/ssya002c.pdf

 also:

 You just have to write software to go through the states of JTAG FSM
 (here is the state diagram of this FSM:
 http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-state-machine-large.png).
 TCK and TMS are used to go through the states of FSM. And TDI is used
 to serially send through this interface your commands and data to JTAG
 controller on the IC (in your case, to the ARM uC) and read back reply
 through the TDO pin. The only problem is that some companies do not open
 all details about available custom JTAG commands (JTAG standard defines
 only 2 necessary commands: EXTEST and SAMPLE and some optional commmands
 like INTEST, BIST and others). For example, Texas Instruments do not
 give an access to the description of commands that are used for
 In-Circuit Debugging of their TMS DSPs. Instead of, they sell this JTAG
 ICD with simple software for about 1000$!!! Nice business - such a price
 for 4 wires and some I/O ICs! ;-)

 Hope this helps.

   EBo --

Re: [9fans] JTAG

[Gorka Guardiola]

On Tue, Oct 26, 2010 at 9:28 PM, EBo <ebo@sandien.com> wrote:
>
> I just ran into the following FAQ and info that might be of help:
>
> a JTAG FAQ: http://hri.sourceforge.net/tools/jtag_faq_org.html
>
> interesting detail:
>
> TAG specification is in Std IEEE 1149.1 (costs about $100). I don't
> have it. Please search at internet for some JTAG related documents.
> This is good: http://www-s.ti.com/sc/psheets/ssya002c/ssya002c.pdf
>
> also:
>
> You just have to write software to go through the states of JTAG FSM (here
> is the state diagram of this FSM:
> http://www.inaccessnetworks.com/projects/ianjtag/jtag-intro/jtag-state-machine-large.png).
> TCK and TMS are used to go through the states of FSM. And TDI is used to
> serially send through this interface your commands and data to JTAG
> controller on the IC (in your case, to the ARM uC) and read back reply
> through the TDO pin. The only problem is that some companies do not open all
> details about available custom JTAG commands (JTAG standard defines only 2
> necessary commands: EXTEST and SAMPLE and some optional commmands like
> INTEST, BIST and others). For example, Texas Instruments do not give an
> access to the description of commands that are used for In-Circuit Debugging
> of their TMS DSPs. Instead of, they sell this JTAG ICD with simple software
> for about 1000$!!! Nice business - such a price for 4 wires and some I/O
> ICs! ;-)
>
> Hope this helps.
>
>  EBo --
>
>

The way I think this works:

USB-MPSSE-JTAG-uP

The USB part is a simple protocol which I already have figured out and is
in the driver's .h.
http://yosemitefoothills.com/Electronics/FTDI_Chip_Commands.html

I am now looking into the MPSSE details which is a
kind of programmable controller for the JTAG which has high level commands
so that operations do not take a round trip through USB.

For this the best docs I found are the openocd code and some documents
referred in it:
http://www.ftdichip.com/Documents/AppNotes/AN2232C-01_MPSSE_Cmnd.pdf
http://openocd.berlios.de/web/

The openocd code is my main reference because it does work on linux.
If I have to I'll resort to sniffing the USB connection in linux, though I hope
it does not come to that.

After the MPSSE (or at the same time)
I have to figure the JTAG part for which probably EBo's references are good,
I haven't figured that part at all. Then there is an standard for
arm called ICE something or other (apparently there are different names and
interfaces for different versions of arm) which lets you look at the different
registers of arm and do interesting things to it. Then there is how the JTAG is
cabled inside the SoCer itself:

http://www.marvell.com/products/processors/embedded/kirkwood/HW_88F6281_OpenSource.pdf

I am working my way slowly through this sorry if this a tad
incoherent, but I haven't
figured most of it yet.

G.

Re: [9fans] JTAG

[EBo]

 Gorka,

 This all sounds good.  I wish you luck...

   EBo --

> The way I think this works:
>
> USB-MPSSE-JTAG-uP
>
> The USB part is a simple protocol which I already have figured out
> and is
> in the driver's .h.
> http://yosemitefoothills.com/Electronics/FTDI_Chip_Commands.html
>
> I am now looking into the MPSSE details which is a
> kind of programmable controller for the JTAG which has high level
> commands
> so that operations do not take a round trip through USB.
>
> For this the best docs I found are the openocd code and some
> documents
> referred in it:
> http://www.ftdichip.com/Documents/AppNotes/AN2232C-01_MPSSE_Cmnd.pdf
> http://openocd.berlios.de/web/
>
> The openocd code is my main reference because it does work on linux.
> If I have to I'll resort to sniffing the USB connection in linux,
> though I hope
> it does not come to that.
>
> After the MPSSE (or at the same time)
> I have to figure the JTAG part for which probably EBo's references
> are good,
> I haven't figured that part at all. Then there is an standard for
> arm called ICE something or other (apparently there are different
> names and
> interfaces for different versions of arm) which lets you look at the
> different
> registers of arm and do interesting things to it. Then there is how
> the JTAG is
> cabled inside the SoCer itself:
>
>
> http://www.marvell.com/products/processors/embedded/kirkwood/HW_88F6281_OpenSource.pdf
>
> I am working my way slowly through this sorry if this a tad
> incoherent, but I haven't
> figured most of it yet.
>
> G.

Re: [9fans] JTAG

[Bhanu Nagendra Pisupati]

I am trying to understand the end objective of
the JTAG work discussed in one of the threads last week (sorry, I'm behind on my mails!).
There was one response that said: "The hope is that it would help debug
usb/bt device issues on kw."; but beyond this I could not make out the use
case for this work from the thread.

Is the idea to use JTAG as a communication pipe on which to export virtual
filesystems from within the device? Can somebody please elaborate?

-Bhanu

> On Tue, Oct 26, 2010 at 10:49 AM, Jeff Sickel <jas@corpus-callosum.com>
wrote:
> At the latest IWP9 I caught wind of interest in getting a JTAG file
system added into Plan 9. ?There were more details than just the file
system and USB connectivity that are still a little > > foggy. ?At first I
didn't show to much enthusiasm but things have changed in a few short
weeks!
>
> What's the status of the effort?
>
>Does a shipment of ice cream need to be arranged for the developers?
>
> -jas

Re: [9fans] JTAG

[Gorka Guardiola]

On Tue, Nov 2, 2010 at 7:32 AM, Bhanu Nagendra Pisupati
<bpisupat@cs.indiana.edu> wrote:
> I am trying to understand the end objective of the JTAG work discussed in
> one of the threads last week (sorry, I'm behind on my mails!).
> There was one response that said: "The hope is that it would help debug
> usb/bt device issues on kw."; but beyond this I could not make out the use
> case for this work from the thread.
>
> Is the idea to use JTAG as a communication pipe on which to export virtual
> filesystems from within the device? Can somebody please elaborate?
>

The idea is to use JTAG to peek/set at the registers and pins and
maybe stop/start
the sheevaplug/guruplug. The JTAG on this machines can be accessed through
an endpoint in the usb/serial console.


--
- curiosity sKilled the cat

Re: [9fans] JTAG

[Steve Simon]

Could one (is is this the plan) to generate a /proc like virtual file system
for jtag so acid will then work over jtag?

-Steve

Re: [9fans] JTAG

[Gorka Guardiola]

On Tue, Nov 2, 2010 at 11:28 AM, Steve Simon <steve@quintile.net> wrote:
> Could one (is is this the plan) to generate a /proc like virtual file system
> for jtag so acid will then work over jtag?
>
> -Steve
>
>

At the level I am thinking/trying now,
I am thinking of exporting a filesystem with a file per TAP (that is
per JTAG accessible
chip in the device). This would be wrapped for the processor
(+memory?) with yet another filesystem
for debugging. I am not sure this fits into a /proc kind of interface because
JTAG lets you access the bare hardware. Nemo has just pointed to me
that a process is not the
same as a running kernel, and maybe the abstraction does not fit that
well. I am not sure.
Maybe there is a middle ground. Maybe we can have an interface where
you write a simple subset
of acid commands (which is what I thought originally). I honestly don't know.

As I said, this is my first experience with JTAG and I am learning as I go.
I think I have the MPSSE under control now (I have written a kind of
mini-assember for it) and
I am now moving to JTAG itself. For the moment a file per TAP will probably do.

G.

Re: [9fans] JTAG

[Eric Van Hensbergen]

FWIW - the BGDBFS stuff had some aspects of this.  I never quite got
to the point of targeting it with acid though (particularly not
multi-node).  It would be an interesting extension, but IIRC it would
also require some pretty invasive changes to ACID (or I could have
just been looking at it wrong).

On Tue, Nov 2, 2010 at 5:28 AM, Steve Simon <steve@quintile.net> wrote:
> Could one (is is this the plan) to generate a /proc like virtual file system
> for jtag so acid will then work over jtag?
>
> -Steve
>
>

[9fans] JTAG

[Bakul Shah]

Probably an overkill but this webpage has a lot of useful
information on JTAG (it might be worth talking to Mark Whitis
and/or checking out some links on the page for the plan9 JTAG
effort).

http://www.freelabs.com/~whitis/electronics/jtag/

Re: [9fans] JTAG

[Nick LaForge]

What a great page!

(I see that it mentions 'urjtag' near the end, which I'd encountered
in trying flash my Altera with an ordinary parallel port.  It has lots
code for many disparate devices in cvs, including mine, the EP2C8.)

Nick

On 11/2/10, Bakul Shah <bakul+plan9@bitblocks.com> wrote:
> Probably an overkill but this webpage has a lot of useful
> information on JTAG (it might be worth talking to Mark Whitis
> and/or checking out some links on the page for the plan9 JTAG
> effort).
>
> http://www.freelabs.com/~whitis/electronics/jtag/
>
>

Re: [9fans] JTAG

[Gorka Guardiola]

On Nov 2, 2010, at 5:45 PM, Bakul Shah <bakul+plan9@bitblocks.com> wrote:

> Probably an overkill but this webpage has a lot of useful
> information on JTAG (it might be worth talking to Mark Whitis
> and/or checking out some links on the page for the plan9 JTAG
> effort).
>
> http://www.freelabs.com/~whitis/electronics/jtag/

Nice! thanks
G.

Re: [9fans] JTAG

[Bhanu Nagendra Pisupati]

> I am not sure this fits into a /proc kind of interface because
> JTAG lets you access the bare hardware. Nemo has just pointed to me
> that a process is not the
> same as a running kernel, and maybe the abstraction does not fit that
> well.

Often cross debugging of embedded systems does not take place on a
per process basis. Breakpoints for instance are set at the address within
flash where the relevant code resides, and gets hit whenver code at that
address gets executed (irrespective of executing process). This assumes
that the code executes in place within flash - things get a bit more
complicated when the code is copied to RAM and then executed.

Therefore all you need to do to facilitate cross debugging is to provide some means to
access registers/memory, control execution, set breakpoints and so on. You
don't typically need to enable this on a per process basis.

> Could one (is is this the plan) to generate a /proc like virtual file system
> for jtag so acid will then work over jtag?

As part of our research work, we had some success exploring a
similar sort of idea to facilitate cross debug embedded code.
The model we used is as follows:

debugger <-- RS232 link --> 9P virtual filesystem <-- JTAG --> ARM7
HOST SIDE                                 EMBEDDED SIDE

A 9P virtual filesystem (implemented on the embedded side) encapsulates
JTAG based debug interface for an ARM7 device. The PC side debugger
mounts this filesystem, and uses it to perform typical debugging
tasks such as access register/memory valus, control execution and so on
without having to deal with any JTAG messiness.

For anybody who's curious to learn more:
http://www.cs.indiana.edu/pub/techreports/TR647.html/embed.html