Re: [9front] 9front on Raspberry Pi 400

[Mack Wallace <mackbw@mapinternet.com>]

I tried the kernel this. evening, 

After detection of CPU 1, 2, and 3 (not necessarily in that order), I get the following lines

xhci 600000000: controller not ready before reset: 00000815
xhci 600000000: controller not halted after reset: 00000815
xhci 600000000: controller not ready after run: 0000080d
#l0: phy1 id 600d84a2 oui 80361
xhci 600000000: controller not ready before reset: 0000080d
sdhc: read error intr 2008002 stat 1fff0000
			...
sdhc: read error intr 2008002 stat 1fff0000
emmc: cmd 123a0033 arg 0 error intr 2008003 stat 1fff0000
sdhc: read error intr 2008002 stat 1fff0000
			...
sdhc: read error intr 2008002 stat 1fff0000
bootargs is (tcp, tls, il, local!device)[]xhci 600000000: controller not halted after reset: 00000811
xhci 600000000: controller not ready after run: 0000080d
xhci 600000000: controller not ready before reset: 0000080d
xhci 600000000: controller not halted after reset: 00000811
xhci 600000000: controller not ready after run: 0000080d
xhci 600000000: controller not ready before reset: 0000080d
xhci 600000000: controller not halted after reset: 00000811
… {repeats}

I unfortunately forgot my jumper wires at home, so I wasn’t able to set up the serial port. Will try tomorrow.

Thanks,

Mack

> On Jan 24, 2021, at 10:01 AM, cinap_lenrek@felloff.net wrote:
> 
> Ok, i also added a bunch of debug prints into the
> xhci driver (in addition to the GIC debug prints)
> and updated the pi9 kernels in these url locations:
> 
> http://felloff.net/usr/cinap_lenrek/9pi4			(kernel for sdcard)
> http://felloff.net/usr/cinap_lenrek/s9pi4			(a.out for debug symbols)
> http://felloff.net/usr/cinap_lenrek/usbxhci.c		(changed file)
> 
> sha1 checksums:
> 
> 0ddfe8a7c00164dc8a07c71219b3ab5eba48da6e	9pi4
> 2f7bc6b6f6ae514b977c6411f27d548eb183d5b1	s9pi4
> 
> and the diff:
> 
> diff -r 5c327eddc496 sys/src/9/port/usbxhci.c
> --- a/sys/src/9/port/usbxhci.c	Sat Jan 23 20:36:09 2021 -0800
> +++ b/sys/src/9/port/usbxhci.c	Sun Jan 24 15:53:30 2021 +0100
> @@ -397,18 +397,32 @@
> 	return nil;
> }
> 
> +static int
> +pollwait(u32int *reg, u32int mask, u32int val, int timeout)
> +{
> +	while((*reg & mask) != val) {
> +		if(timeout <= 0)
> +			return -1;
> +		timeout -= 10;
> +		if(up != nil && islo())
> +			tsleep(&up->sleep, return0, nil, 10);
> +		else
> +			delay(10);
> +	}
> +	return 0;
> +}
> +
> static void
> handoff(Ctlr *ctlr)
> {
> 	u32int *r;
> -	int i;
> 
> 	if((r = xecp(ctlr, 1, nil)) == nil)
> 		return;
> 	if(getconf("*noxhcihandoff") == nil){
> 		r[0] |= 1<<24;		/* request ownership */
> -		for(i = 0; (r[0] & (1<<16)) != 0 && i<100; i++)
> -			tsleep(&up->sleep, return0, nil, 10);
> +		if(pollwait(&r[0], 1<<16, 0, 1000) < 0)
> +			print("xhci %llux: handoff timeout\n", ctlr->base);
> 	}
> 	/* disable SMI interrupts */
> 	r[1] &= 7<<1 | 255<<5 | 7<<17 | 7<<29;
> @@ -421,11 +435,9 @@
> shutdown(Hci *hp)
> {
> 	Ctlr *ctlr = hp->aux;
> -	int i;
> 
> 	ctlr->opr[USBCMD] = 0;
> -	for(i=0; (ctlr->opr[USBSTS] & HCH) == 0 && i < 10; i++)
> -		delay(10);
> +	pollwait(&ctlr->opr[USBSTS], HCH, HCH, 100);
> 	intrdisable(ctlr->pcidev->intl, hp->interrupt, hp, ctlr->pcidev->tbdf, hp->type);
> 	pcidisable(ctlr->pcidev);
> }
> @@ -477,13 +489,16 @@
> 	ctlr->hccparams = ctlr->mmio[HCCPARAMS];
> 	handoff(ctlr);
> 
> -	for(i=0; (ctlr->opr[USBSTS] & CNR) != 0 && i<100; i++)
> -		tsleep(&up->sleep, return0, nil, 10);
> +	if(pollwait(&ctlr->opr[USBSTS], CNR, 0, 1000) < 0)
> +		print("xhci %llux: controller not ready before reset: %.8ux\n",
> +			ctlr->base, ctlr->opr[USBSTS]);
> 
> 	ctlr->opr[USBCMD] = HCRST;
> 	delay(1);
> -	for(i=0; (ctlr->opr[USBSTS] & (CNR|HCH)) != HCH && i<100; i++)
> -		tsleep(&up->sleep, return0, nil, 10);
> +
> +	if(pollwait(&ctlr->opr[USBSTS], CNR|HCH, HCH, 1000) < 0)
> +		print("xhci %llux: controller not halted after reset: %.8ux\n",
> +			ctlr->base, ctlr->opr[USBSTS]);
> 
> 	pcisetbme(ctlr->pcidev);
> 	intrenable(ctlr->pcidev->intl, hp->interrupt, hp, ctlr->pcidev->tbdf, hp->type);
> @@ -593,8 +608,10 @@
> 	coherence();
> 
> 	ctlr->opr[USBCMD] = RUNSTOP|INTE|HSEE|EWE;
> -	for(i=0; (ctlr->opr[USBSTS] & (CNR|HCH)) != 0 && i<100; i++)
> -		tsleep(&up->sleep, return0, nil, 10);
> +
> +	if(pollwait(&ctlr->opr[USBSTS], CNR|HCH, 0, 1000) < 0)
> +		print("xhci %llux: controller not ready after run: %.8ux\n",
> +			ctlr->base, ctlr->opr[USBSTS]);
> 
> 	kproc("xhcirecover", recover, hp);
> }
> 
> --
> cinap
>