* pci: add did for the x260's southbridge chipset
@ 2019-05-05 1:10 Rodrigo G. López
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From: Rodrigo G. López @ 2019-05-05 1:10 UTC (permalink / raw)
To: 9front
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hi!
i'm attaching the patch with the new addition.
i tested this on the x260 and now i get the following list of routes:
pcirouting: PCI.0.2.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.20.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.20.2 at pin 3 link 62 irq 11 -> 11
pcirouting: PCI.0.22.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.23.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.28.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.28.2 at pin 3 link 62 irq 11 -> 11
pcirouting: PCI.2.0.0 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.4.0.0 at pin 1 link 62 irq 11 -> 11
pcirouting: PCI.0.31.3 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.31.4 at pin 1 link 60 irq 11 -> 11
pcirouting: PCI.0.31.6 at pin 1 link 60 irq 11 -> 11
i don't get this in any other system. any idea about what's happenning?
i'll check the code tomorrow.
thanks!
-rodri
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[-- Attachment #2: pci.patch --]
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diff -r d41b5fcde5ce sys/src/9/pc/pci.c
--- a/sys/src/9/pc/pci.c Sun May 05 00:26:17 2019 +0200
+++ b/sys/src/9/pc/pci.c Sun May 05 02:52:41 2019 +0200
@@ -684,6 +684,7 @@
{ 0x8086, 0x1c49, pIIxget, pIIxset }, /* Intel 82hm65 cougar point pch */
{ 0x8086, 0x1c4b, pIIxget, pIIxset }, /* Intel 82hm67 */
{ 0x8086, 0x1c4f, pIIxget, pIIxset }, /* Intel 82qm67 cougar point pch */
+ { 0x8086, 0x9d48, pIIxget, pIIxset }, /* Intel 82qm170 sunrise point lpc */
{ 0x8086, 0x1c52, pIIxget, pIIxset }, /* Intel 82q65 cougar point pch */
{ 0x8086, 0x1c54, pIIxget, pIIxset }, /* Intel 82q67 cougar point pch */
{ 0x8086, 0x1e55, pIIxget, pIIxset }, /* Intel QM77 panter point lpc */
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